diff options
| author | Elyes HAOUAS <ehaouas@noos.fr> | 2017-06-28 20:44:41 +0200 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2017-07-01 00:20:14 +0000 |
| commit | 692e7df6c1e63ad795caed163eb0cab3992882a8 (patch) | |
| tree | 8cee455ee9832cb140aa860ced594358bdcbaaf1 /src/northbridge/intel | |
| parent | 127d33958009260b5a3d34fe28c8d65434f52cc7 (diff) | |
nb/intel/i945/gma.c: Add whitespace around '<<'
Change-Id: Ic01bbae9acaabaade777db52825aa80d25fc5961
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/20410
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/northbridge/intel')
| -rw-r--r-- | src/northbridge/intel/i945/gma.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c index 3c5cee5040..c3d850668f 100644 --- a/src/northbridge/intel/i945/gma.c +++ b/src/northbridge/intel/i945/gma.c @@ -40,7 +40,7 @@ #define DISPPLANE_BGRX888 (0x6<<26) #define DPLLB_LVDS_P2_CLOCK_DIV_7 (1 << 24) /* i915 */ -#define DPLL_INTEGRATED_CRI_CLK_VLV (1<<14) +#define DPLL_INTEGRATED_CRI_CLK_VLV (1 << 14) #define PGETBL_CTL 0x2020 #define PGETBL_ENABLED 0x00000001 |