diff options
| author | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-12-06 14:32:23 +1100 |
|---|---|---|
| committer | Edward O'Callaghan <eocallaghan@alterapraxis.com> | 2014-12-06 10:03:30 +0100 |
| commit | 4568f19d1fb0d118e5fcebbe82b7878951c4bfff (patch) | |
| tree | 6d98904e44cdd29e27eb3dec62ab7af325d1651c /src/northbridge/intel | |
| parent | 0a0d04895f709e00e7636146c68bdc1665b098eb (diff) | |
northbridge/intel/*/acpi/igd.asl: Trivial indent style fix
Change-Id: I26e92645264c69bbc032b0e7e44d7d31de2dfa4d
Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-on: http://review.coreboot.org/7665
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/northbridge/intel')
| -rw-r--r-- | src/northbridge/intel/gm45/acpi/igd.asl | 4 | ||||
| -rw-r--r-- | src/northbridge/intel/nehalem/acpi/igd.asl | 22 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/acpi/igd.asl | 4 |
3 files changed, 15 insertions, 15 deletions
diff --git a/src/northbridge/intel/gm45/acpi/igd.asl b/src/northbridge/intel/gm45/acpi/igd.asl index c5b4b6a007..199765bf34 100644 --- a/src/northbridge/intel/gm45/acpi/igd.asl +++ b/src/northbridge/intel/gm45/acpi/igd.asl @@ -27,8 +27,8 @@ Device (GFX0) Field (GFXC, DWordAcc, NoLock, Preserve) { Offset (0x10), - BAR0, 64 - } + BAR0, 64 + } OperationRegion (GFRG, SystemMemory, And (BAR0, 0xfffffffffffffff0), 0x400000) Field (GFRG, DWordAcc, NoLock, Preserve) diff --git a/src/northbridge/intel/nehalem/acpi/igd.asl b/src/northbridge/intel/nehalem/acpi/igd.asl index a892ce24bb..8c6c174f34 100644 --- a/src/northbridge/intel/nehalem/acpi/igd.asl +++ b/src/northbridge/intel/nehalem/acpi/igd.asl @@ -24,21 +24,21 @@ Device (GFX0) Name (_ADR, 0x00020000) OperationRegion (GFXC, PCI_Config, 0x00, 0x0100) - Field (GFXC, DWordAcc, NoLock, Preserve) - { - Offset (0x10), - BAR0, 64 - } + Field (GFXC, DWordAcc, NoLock, Preserve) + { + Offset (0x10), + BAR0, 64 + } - OperationRegion (GFRG, SystemMemory, And (BAR0, 0xfffffffffffffff0), 0x400000) + OperationRegion (GFRG, SystemMemory, And (BAR0, 0xfffffffffffffff0), 0x400000) Field (GFRG, DWordAcc, NoLock, Preserve) - { - Offset (0x48254), + { + Offset (0x48254), BCLV, 16, - Offset (0xc8250), - CR1, 32, + Offset (0xc8250), + CR1, 32, CR2, 32 - } + } /* Display Output Switching */ Method (_DOS, 1) diff --git a/src/northbridge/intel/sandybridge/acpi/igd.asl b/src/northbridge/intel/sandybridge/acpi/igd.asl index d40fad54f5..8c6c174f34 100644 --- a/src/northbridge/intel/sandybridge/acpi/igd.asl +++ b/src/northbridge/intel/sandybridge/acpi/igd.asl @@ -27,10 +27,10 @@ Device (GFX0) Field (GFXC, DWordAcc, NoLock, Preserve) { Offset (0x10), - BAR0, 64 + BAR0, 64 } - OperationRegion (GFRG, SystemMemory, And(BAR0, 0xfffffffffffffff0), 0x400000) + OperationRegion (GFRG, SystemMemory, And (BAR0, 0xfffffffffffffff0), 0x400000) Field (GFRG, DWordAcc, NoLock, Preserve) { Offset (0x48254), |