diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-11-19 16:41:40 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-22 22:13:55 +0000 |
| commit | 2921cbf277f533126e1bd84702e83957c977f5b6 (patch) | |
| tree | 504a733bf6791f8ddf10d2c652e2298166e3e4d6 /src/northbridge/intel | |
| parent | 2a7d752aaa9f999059cf3b88956961ecc1540ba6 (diff) | |
nb/intel/sandybridge: Correct get_COMP2 function
Values differ between Sandy and Ivy Bridge. Remove the lookup table,
since it contains duplicated values and is hard to see which values
correspond to which frequencies. New values come from reference code.
Change-Id: I3b28568f0053f1b39618e16bdffc24207547d81f
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47765
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge/intel')
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_native.c | 23 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_tables.c | 17 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_tables.h | 2 |
3 files changed, 16 insertions, 26 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_native.c b/src/northbridge/intel/sandybridge/raminit_native.c index aec6a857cf..e7a3352b28 100644 --- a/src/northbridge/intel/sandybridge/raminit_native.c +++ b/src/northbridge/intel/sandybridge/raminit_native.c @@ -157,14 +157,23 @@ static u8 get_AONPD(u32 FRQ, u8 base_freq) return frq_aonpd_map[0][FRQ - 3]; } -/* Get COMP2 based on frequency index */ -static u32 get_COMP2(u32 FRQ, u8 base_freq) +/* Get COMP2 based on CPU generation and clock speed */ +static u32 get_COMP2(const ramctr_timing *ctrl) { - if (base_freq == 100) - return frq_comp2_map[1][FRQ - 7]; - + const bool is_ivybridge = IS_IVY_CPU(ctrl->cpu); + + if (ctrl->tCK <= TCK_1066MHZ) + return is_ivybridge ? 0x0C235924 : 0x0C21410C; + else if (ctrl->tCK <= TCK_933MHZ) + return is_ivybridge ? 0x0C446964 : 0x0C42514C; + else if (ctrl->tCK <= TCK_800MHZ) + return is_ivybridge ? 0x0C6671E4 : 0x0C6369CC; + else if (ctrl->tCK <= TCK_666MHZ) + return is_ivybridge ? 0x0CA8C264 : 0x0CA57A4C; + else if (ctrl->tCK <= TCK_533MHZ) + return is_ivybridge ? 0x0CEBDB64 : 0x0CE7C34C; else - return frq_comp2_map[0][FRQ - 3]; + return is_ivybridge ? 0x0D6FF5E4 : 0x0D6BEDCC; } static void normalize_tclk(ramctr_timing *ctrl, bool ref_100mhz_support) @@ -586,7 +595,7 @@ static void dram_ioregs(ramctr_timing *ctrl) printram("done\n"); /* Set COMP2 */ - MCHBAR32(CRCOMPOFST2) = get_COMP2(ctrl->FRQ, ctrl->base_freq); + MCHBAR32(CRCOMPOFST2) = get_COMP2(ctrl); printram("COMP2 done\n"); /* Set COMP1 */ diff --git a/src/northbridge/intel/sandybridge/raminit_tables.c b/src/northbridge/intel/sandybridge/raminit_tables.c index c3ba9de863..3643dcb4c2 100644 --- a/src/northbridge/intel/sandybridge/raminit_tables.c +++ b/src/northbridge/intel/sandybridge/raminit_tables.c @@ -91,23 +91,6 @@ const u8 frq_aonpd_map[2][8] = { }, }; -const u32 frq_comp2_map[2][8] = { - { /* 133 MHz */ - /* FRQ: 7, 8, 9, 10, */ - 0x0CA8C264, 0x0C6671E4, 0x0C6671E4, 0x0C446964, - - /* FRQ: 11, 12, N/A, N/A, */ - 0x0C235924, 0x0C235924, 0, 0, - }, - { /* 100 MHz */ - /* FRQ: 3, 4, 5, 6, */ - 0x0D6FF5E4, 0x0CEBDB64, 0x0CA8C264, 0x0C6671E4, - - /* FRQ: 7, 8, 9, 10, */ - 0x0C446964, 0x0C235924, 0x0C235924, 0x0C235924, - }, -}; - const u32 pattern[32][16] = { {0x00000000, 0x00000000, 0xffffffff, 0xffffffff, 0x00000000, 0x00000000, 0xffffffff, 0xffffffff, diff --git a/src/northbridge/intel/sandybridge/raminit_tables.h b/src/northbridge/intel/sandybridge/raminit_tables.h index 49101cb5ee..308448f967 100644 --- a/src/northbridge/intel/sandybridge/raminit_tables.h +++ b/src/northbridge/intel/sandybridge/raminit_tables.h @@ -21,8 +21,6 @@ extern const u8 frq_xp_map[2][8]; extern const u8 frq_aonpd_map[2][8]; -extern const u32 frq_comp2_map[2][8]; - extern const u32 pattern[32][16]; extern const u8 use_base[63][32]; |