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authorNico Huber <nico.huber@secunet.com>2013-05-14 11:43:03 +0200
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-05-22 18:00:56 +0200
commit26a64351234093fbeea6e776be8829eae012ce7f (patch)
tree477cee1c0e3c6f43b0e3f1fc2de796869fbc2457 /src/northbridge/intel
parent0da92863a754828eb807f1a15927f0dc288a1788 (diff)
intel/gm45: Refactor DDR3 read training
Split some code in individual functions. It's the refactoring part of a bigger change, following... Change-Id: Ied551a011eaf22f6f8f6db0044de3634134f0b37 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/3253 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r--src/northbridge/intel/gm45/raminit_read_write_training.c74
1 files changed, 46 insertions, 28 deletions
diff --git a/src/northbridge/intel/gm45/raminit_read_write_training.c b/src/northbridge/intel/gm45/raminit_read_write_training.c
index 8c8e66a807..6936d0788f 100644
--- a/src/northbridge/intel/gm45/raminit_read_write_training.c
+++ b/src/northbridge/intel/gm45/raminit_read_write_training.c
@@ -99,50 +99,68 @@ static int read_training_test(const int channel, const int lane,
}
return 1;
}
-static void read_training_per_lane(const int channel, const int lane,
- const address_bunch_t *const addresses)
+static void read_training_find_lower(const int channel, const int lane,
+ const address_bunch_t *const addresses,
+ read_timing_t *const lower)
{
- read_timing_t lower, upper;
-
- MCHBAR32(CxRDTy_MCHBAR(channel, lane)) |= 3 << 25;
-
- /* Search lower bound. */
- lower.t = 0;
- lower.p = 0;
- program_read_timing(channel, lane, &lower);
/* Coarse search for good t. */
+ program_read_timing(channel, lane, lower);
while (!read_training_test(channel, lane, addresses)) {
- ++lower.t;
- program_read_timing(channel, lane, &lower);
+ ++lower->t;
+ program_read_timing(channel, lane, lower);
}
+
/* Step back, then fine search for good p. */
- if (lower.t > 0) {
- --lower.t;
- program_read_timing(channel, lane, &lower);
+ if (lower->t > 0) {
+ --lower->t;
+ program_read_timing(channel, lane, lower);
while (!read_training_test(channel, lane, addresses)) {
- ++lower.p;
- program_read_timing(channel, lane, &lower);
+ ++lower->p;
+ program_read_timing(channel, lane, lower);
}
}
-
- /* Search upper bound. */
- upper.t = lower.t + 1;
- upper.p = lower.p;
- program_read_timing(channel, lane, &upper);
+}
+static void read_training_find_upper(const int channel, const int lane,
+ const address_bunch_t *const addresses,
+ read_timing_t *const upper)
+{
+ program_read_timing(channel, lane, upper);
if (!read_training_test(channel, lane, addresses))
die("Read training failed: limits too narrow.\n");
/* Coarse search for bad t. */
do {
- ++upper.t;
- program_read_timing(channel, lane, &upper);
+ ++upper->t;
+ program_read_timing(channel, lane, upper);
} while (read_training_test(channel, lane, addresses));
/* Fine search for bad p. */
- --upper.t;
- program_read_timing(channel, lane, &upper);
+ --upper->t;
+ program_read_timing(channel, lane, upper);
while (read_training_test(channel, lane, addresses)) {
- ++upper.p;
- program_read_timing(channel, lane, &upper);
+ ++upper->p;
+ program_read_timing(channel, lane, upper);
}
+}
+static void read_training_per_lane(const int channel, const int lane,
+ const address_bunch_t *const addresses)
+{
+ read_timing_t lower, upper;
+
+ MCHBAR32(CxRDTy_MCHBAR(channel, lane)) |= 3 << 25;
+
+ /*** Search lower bound. ***/
+
+ /* Start at zero. */
+ lower.t = 0;
+ lower.p = 0;
+ read_training_find_lower(channel, lane, addresses, &lower);
+
+ /*** Search upper bound. ***/
+
+ /* Start at lower + 1t. */
+ upper.t = lower.t + 1;
+ upper.p = lower.p;
+
+ read_training_find_upper(channel, lane, addresses, &upper);
/* Calculate and program mean value. */
lower.p += lower.t << READ_TIMING_P_SHIFT;