Add high tables support to all northbridges.

Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> 



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4238 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

18 files changed, 132 insertions, 2 deletions

diff --git a/src/northbridge/intel/e7501/Config.lb b/src/northbridge/intel/e7501/Config.lb
index 59154f7ed3..2a8095f692 100644
--- a/src/northbridge/intel/e7501/Config.lb
+++ b/src/northbridge/intel/e7501/Config.lb
@@ -1,3 +1,7 @@
+uses HAVE_HIGH_TABLES
+
 config chip.h
 
 object northbridge.o
+
+default HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/intel/e7501/northbridge.c b/src/northbridge/intel/e7501/northbridge.c
index b1d553aab1..7168bf3112 100644
--- a/src/northbridge/intel/e7501/northbridge.c
+++ b/src/northbridge/intel/e7501/northbridge.c
@@ -65,6 +65,11 @@ static uint32_t find_pci_tolm(struct bus *bus)
 	return tolm;
 }
 
+#if HAVE_HIGH_TABLES==1
+#define HIGH_TABLES_SIZE 64	// maximum size of high tables in KB
+extern uint64_t high_tables_base, high_tables_size;
+#endif
+
 static void pci_domain_set_resources(device_t dev)
 {
 	device_t mc_dev;
@@ -140,6 +145,12 @@ static void pci_domain_set_resources(device_t dev)
 			ram_resource(dev, idx++, remapbasek,
 				(remaplimitk + 64*1024) - remapbasek);
 		}
+
+#if HAVE_HIGH_TABLES==1
+		/* Leave some space for ACPI, PIRQ and MP tables */
+		high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
+		high_tables_size = HIGH_TABLES_SIZE * 1024;
+#endif
 	}
 	assign_resources(&dev->link[0]);
 }
diff --git a/src/northbridge/intel/e7520/Config.lb b/src/northbridge/intel/e7520/Config.lb
index 064c867618..03a78974d4 100644
--- a/src/northbridge/intel/e7520/Config.lb
+++ b/src/northbridge/intel/e7520/Config.lb
@@ -1,3 +1,5 @@
+uses HAVE_HIGH_TABLES
+
 config chip.h
 driver northbridge.o
 driver pciexp_porta.o
@@ -5,6 +7,8 @@ driver pciexp_porta1.o
 driver pciexp_portb.o
 driver pciexp_portc.o
 
+default HAVE_HIGH_TABLES=1
+
 makerule raminit_test
 	depends "$(TOP)/src/northbridge/intel/e7520/raminit_test.c"
 	depends "$(TOP)/src/northbridge/intel/e7520/raminit.c"
diff --git a/src/northbridge/intel/e7520/northbridge.c b/src/northbridge/intel/e7520/northbridge.c
index ad44c9b5e6..f2b2a0f3a0 100644
--- a/src/northbridge/intel/e7520/northbridge.c
+++ b/src/northbridge/intel/e7520/northbridge.c
@@ -76,6 +76,10 @@ static uint32_t find_pci_tolm(struct bus *bus)
 	return tolm;
 }
 
+#if HAVE_HIGH_TABLES==1
+#define HIGH_TABLES_SIZE 64	// maximum size of high tables in KB
+extern uint64_t high_tables_base, high_tables_size;
+#endif
 
 static void pci_domain_set_resources(device_t dev)
 {
@@ -164,6 +168,12 @@ static void pci_domain_set_resources(device_t dev)
 			ram_resource(dev, 6, remapbasek, 
 				(remaplimitk + 64*1024) - remapbasek);
 		}
+
+#if HAVE_HIGH_TABLES==1
+		/* Leave some space for ACPI, PIRQ and MP tables */
+		high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
+		high_tables_size = HIGH_TABLES_SIZE * 1024;
+#endif
 	}
 	assign_resources(&dev->link[0]);
 }
diff --git a/src/northbridge/intel/e7525/Config.lb b/src/northbridge/intel/e7525/Config.lb
index 919e0f8adf..07930ff434 100644
--- a/src/northbridge/intel/e7525/Config.lb
+++ b/src/northbridge/intel/e7525/Config.lb
@@ -1,3 +1,5 @@
+uses HAVE_HIGH_TABLES
+
 config chip.h
 driver northbridge.o
 driver pciexp_porta.o
@@ -5,6 +7,8 @@ driver pciexp_porta1.o
 driver pciexp_portb.o
 driver pciexp_portc.o
 
+default HAVE_HIGH_TABLES=1
+
 makerule raminit_test
 	depends "$(TOP)/src/northbridge/intel/e7525/raminit_test.c"
 	depends "$(TOP)/src/northbridge/intel/e7525/raminit.c"
diff --git a/src/northbridge/intel/e7525/northbridge.c b/src/northbridge/intel/e7525/northbridge.c
index 2ed8922339..7900129ec2 100644
--- a/src/northbridge/intel/e7525/northbridge.c
+++ b/src/northbridge/intel/e7525/northbridge.c
@@ -76,6 +76,10 @@ static uint32_t find_pci_tolm(struct bus *bus)
 	return tolm;
 }
 
+#if HAVE_HIGH_TABLES==1
+#define HIGH_TABLES_SIZE 64	// maximum size of high tables in KB
+extern uint64_t high_tables_base, high_tables_size;
+#endif
 
 static void pci_domain_set_resources(device_t dev)
 {
@@ -164,6 +168,12 @@ static void pci_domain_set_resources(device_t dev)
 			ram_resource(dev, 6, remapbasek, 
 				(remaplimitk + 64*1024) - remapbasek);
 		}
+
+#if HAVE_HIGH_TABLES==1
+		/* Leave some space for ACPI, PIRQ and MP tables */
+		high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
+		high_tables_size = HIGH_TABLES_SIZE * 1024;
+#endif
 	}
 	assign_resources(&dev->link[0]);
 }
diff --git a/src/northbridge/intel/i3100/Config.lb b/src/northbridge/intel/i3100/Config.lb
index ea4c8eb728..1534605dc0 100644
--- a/src/northbridge/intel/i3100/Config.lb
+++ b/src/northbridge/intel/i3100/Config.lb
@@ -17,6 +17,11 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
+uses HAVE_HIGH_TABLES
+
 config chip.h
+
 driver northbridge.o
 driver pciexp_porta.o
+
+default HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/intel/i3100/northbridge.c b/src/northbridge/intel/i3100/northbridge.c
index d36af7caae..928fe94c73 100644
--- a/src/northbridge/intel/i3100/northbridge.c
+++ b/src/northbridge/intel/i3100/northbridge.c
@@ -97,6 +97,10 @@ static u32 find_pci_tolm(struct bus *bus)
 	return tolm;
 }
 
+#if HAVE_HIGH_TABLES==1
+#define HIGH_TABLES_SIZE 64	// maximum size of high tables in KB
+extern uint64_t high_tables_base, high_tables_size;
+#endif
 
 static void pci_domain_set_resources(device_t dev)
 {
@@ -185,6 +189,12 @@ static void pci_domain_set_resources(device_t dev)
 			ram_resource(dev, 6, remapbasek,
 				(remaplimitk + 64*1024) - remapbasek);
 		}
+
+#if HAVE_HIGH_TABLES==1
+		/* Leave some space for ACPI, PIRQ and MP tables */
+		high_tables_base = (tolmk - HIGH_TABLES_SIZE) * 1024;
+		high_tables_size = HIGH_TABLES_SIZE * 1024;
+#endif
 	}
 	assign_resources(&dev->link[0]);
 }
diff --git a/src/northbridge/intel/i440bx/Config.lb b/src/northbridge/intel/i440bx/Config.lb
index 82a05ee265..c9a26b08b3 100644
--- a/src/northbridge/intel/i440bx/Config.lb
+++ b/src/northbridge/intel/i440bx/Config.lb
@@ -18,5 +18,10 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
+uses HAVE_HIGH_TABLES
+
 config chip.h
+
 driver northbridge.o
+
+default HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/intel/i440bx/northbridge.c b/src/northbridge/intel/i440bx/northbridge.c
index 306e73e66d..f95a1a7597 100644
--- a/src/northbridge/intel/i440bx/northbridge.c
+++ b/src/northbridge/intel/i440bx/northbridge.c
@@ -91,6 +91,10 @@ static uint32_t find_pci_tolm(struct bus *bus)
 	return tolm;
 }
 
+#if HAVE_HIGH_TABLES==1
+#define HIGH_TABLES_SIZE 64	// maximum size of high tables in KB
+extern uint64_t high_tables_base, high_tables_size;
+#endif
 static void pci_domain_set_resources(device_t dev)
 {
 	device_t mc_dev;
@@ -127,6 +131,12 @@ static void pci_domain_set_resources(device_t dev)
 		idx = 10;
 		ram_resource(dev, idx++, 0, 640);
 		ram_resource(dev, idx++, 768, tolmk - 768);
+ 
+#if HAVE_HIGH_TABLES==1
+		/* Leave some space for ACPI, PIRQ and MP tables */
+		high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
+		high_tables_size = HIGH_TABLES_SIZE * 1024;
+#endif
 	}
 
 	assign_resources(&dev->link[0]);
diff --git a/src/northbridge/intel/i82810/Config.lb b/src/northbridge/intel/i82810/Config.lb
index e8d57b2fb8..04375d89c1 100644
--- a/src/northbridge/intel/i82810/Config.lb
+++ b/src/northbridge/intel/i82810/Config.lb
@@ -18,5 +18,10 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
+uses HAVE_HIGH_TABLES
+
 config chip.h
+
 driver northbridge.o
+
+default HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/intel/i82810/northbridge.c b/src/northbridge/intel/i82810/northbridge.c
index eb8a657982..bfbd338069 100644
--- a/src/northbridge/intel/i82810/northbridge.c
+++ b/src/northbridge/intel/i82810/northbridge.c
@@ -122,6 +122,11 @@ static int translate_i82810_to_mb[] = {
 /* MB */0, 8, 0, 16, 16, 24, 32, 32, 48, 64, 64, 96, 128, 128, 192, 256,
 };
 
+#if HAVE_HIGH_TABLES==1
+#define HIGH_TABLES_SIZE 64	// maximum size of high tables in KB
+extern uint64_t high_tables_base, high_tables_size;
+#endif
+
 static void pci_domain_set_resources(device_t dev)
 {
 	device_t mc_dev;
@@ -166,6 +171,12 @@ static void pci_domain_set_resources(device_t dev)
 		idx = 10;
 		ram_resource(dev, idx++, 0, 640);
 		ram_resource(dev, idx++, 1024, tolmk - 1024);
+
+#if HAVE_HIGH_TABLES==1
+		/* Leave some space for ACPI, PIRQ and MP tables */
+		high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
+		high_tables_size = HIGH_TABLES_SIZE * 1024;
+#endif
 	}
 	assign_resources(&dev->link[0]);
 }
diff --git a/src/northbridge/intel/i82830/Config.lb b/src/northbridge/intel/i82830/Config.lb
index d2ccd5d926..f55eab27fd 100644
--- a/src/northbridge/intel/i82830/Config.lb
+++ b/src/northbridge/intel/i82830/Config.lb
@@ -18,5 +18,10 @@
 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
 ##
 
+uses HAVE_HIGH_TABLES
+
 config chip.h
+
 driver northbridge.o
+
+default HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/intel/i82830/northbridge.c b/src/northbridge/intel/i82830/northbridge.c
index 689bf19bc2..bf79ecdca1 100644
--- a/src/northbridge/intel/i82830/northbridge.c
+++ b/src/northbridge/intel/i82830/northbridge.c
@@ -107,6 +107,10 @@ static uint32_t find_pci_tolm(struct bus *bus)
 	return tolm;
 }
 
+#if HAVE_HIGH_TABLES==1
+#define HIGH_TABLES_SIZE 64	// maximum size of high tables in KB
+extern uint64_t high_tables_base, high_tables_size;
+#endif
 static void pci_domain_set_resources(device_t dev)
 {
 	device_t mc_dev;
@@ -144,6 +148,12 @@ static void pci_domain_set_resources(device_t dev)
 		idx = 10;
 		ram_resource(dev, idx++, 0, 640);
 		ram_resource(dev, idx++, 1024, tolmk - 1024);
+
+#if HAVE_HIGH_TABLES==1
+		/* Leave some space for ACPI, PIRQ and MP tables */
+		high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
+		high_tables_size = HIGH_TABLES_SIZE * 1024;
+#endif
 	}
 	assign_resources(&dev->link[0]);
 }
diff --git a/src/northbridge/intel/i855gme/Config.lb b/src/northbridge/intel/i855gme/Config.lb
index 5a7cd14600..83edd47783 100644
--- a/src/northbridge/intel/i855gme/Config.lb
+++ b/src/northbridge/intel/i855gme/Config.lb
@@ -18,7 +18,10 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
+uses HAVE_HIGH_TABLES
+
 config chip.h
+
 object northbridge.o
-#driver misc_control.o
 
+default HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/intel/i855gme/northbridge.c b/src/northbridge/intel/i855gme/northbridge.c
index e5fecf16ee..ec42c6eb73 100644
--- a/src/northbridge/intel/i855gme/northbridge.c
+++ b/src/northbridge/intel/i855gme/northbridge.c
@@ -88,6 +88,10 @@ static uint32_t find_pci_tolm(struct bus *bus)
 	return tolm;
 }
 
+#if HAVE_HIGH_TABLES==1
+#define HIGH_TABLES_SIZE 64	// maximum size of high tables in KB
+extern uint64_t high_tables_base, high_tables_size;
+#endif
 static void pci_domain_set_resources(device_t dev)
 {
 	device_t mc_dev;
@@ -143,6 +147,11 @@ static void pci_domain_set_resources(device_t dev)
 		/* ram_resource(dev, idx++, 1024, tolmk - 1024); */
 		ram_resource(dev, idx++, 768, tolmk - 768);
 
+#if HAVE_HIGH_TABLES==1
+		/* Leave some space for ACPI, PIRQ and MP tables */
+		high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
+		high_tables_size = HIGH_TABLES_SIZE * 1024;
+#endif
 	}
 	assign_resources(&dev->link[0]);
 }
diff --git a/src/northbridge/intel/i855pm/Config.lb b/src/northbridge/intel/i855pm/Config.lb
index f101a921fd..2a8095f692 100644
--- a/src/northbridge/intel/i855pm/Config.lb
+++ b/src/northbridge/intel/i855pm/Config.lb
@@ -1,4 +1,7 @@
+uses HAVE_HIGH_TABLES
+
 config chip.h
+
 object northbridge.o
-#driver misc_control.o
 
+default HAVE_HIGH_TABLES=1
diff --git a/src/northbridge/intel/i855pm/northbridge.c b/src/northbridge/intel/i855pm/northbridge.c
index 60648542ae..4fbd3b3cec 100644
--- a/src/northbridge/intel/i855pm/northbridge.c
+++ b/src/northbridge/intel/i855pm/northbridge.c
@@ -66,6 +66,11 @@ static uint32_t find_pci_tolm(struct bus *bus)
 	return tolm;
 }
 
+#if HAVE_HIGH_TABLES==1
+#define HIGH_TABLES_SIZE 64	// maximum size of high tables in KB
+extern uint64_t high_tables_base, high_tables_size;
+#endif
+
 static void pci_domain_set_resources(device_t dev)
 {
 	device_t mc_dev;
@@ -108,6 +113,12 @@ static void pci_domain_set_resources(device_t dev)
 		idx = 10;
 		ram_resource(dev, idx++, 0, 640);
 		ram_resource(dev, idx++, 768, tolmk - 768);
+
+#if HAVE_HIGH_TABLES==1
+		/* Leave some space for ACPI, PIRQ and MP tables */
+		high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
+		high_tables_size = HIGH_TABLES_SIZE * 1024;
+#endif
 	}
 	assign_resources(&dev->link[0]);
 }