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authorElyes HAOUAS <ehaouas@noos.fr>2020-08-11 09:39:43 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-08-17 07:00:37 +0000
commita4dd33cc8b52f686908590bb41b1c69a9b6c5db5 (patch)
tree95cf94c3ff438647096ff3300f0972b2f5b797e3 /src/northbridge/intel
parenta3022056a2d16b92cc0cdf5eafa4e6369c09e716 (diff)
src: Use PCI_BASE_ADDRESS_* macros instead of magic numbers
Change-Id: Id3390c5ac6a9517ffc2d202f41802e6f4d2e314c Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44371 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r--src/northbridge/intel/pineview/gma.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/northbridge/intel/pineview/gma.c b/src/northbridge/intel/pineview/gma.c
index e46bd7c7c2..e0ed0f0500 100644
--- a/src/northbridge/intel/pineview/gma.c
+++ b/src/northbridge/intel/pineview/gma.c
@@ -6,6 +6,7 @@
#include <delay.h>
#include <device/device.h>
#include <device/pci.h>
+#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <drivers/intel/gma/i915_reg.h>
@@ -234,9 +235,9 @@ static void gma_func0_init(struct device *dev)
int vga_disable = (pci_read_config16(dev, GGC) & 2) >> 1;
/* Find base addresses */
- mmio_res = find_resource(dev, 0x10);
- gtt_res = find_resource(dev, 0x1c);
- pio_res = find_resource(dev, 0x14);
+ mmio_res = find_resource(dev, PCI_BASE_ADDRESS_0);
+ gtt_res = find_resource(dev, PCI_BASE_ADDRESS_3);
+ pio_res = find_resource(dev, PCI_BASE_ADDRESS_1);
physbase = pci_read_config32(dev, 0x5c) & ~0xf;
if (gtt_res && gtt_res->base && physbase && pio_res && pio_res->base) {