summaryrefslogtreecommitdiff
path: root/src/northbridge/intel
diff options
context:
space:
mode:
authorIru Cai <mytbk920423@gmail.com>2018-08-16 16:46:27 +0800
committerMartin Roth <martinroth@google.com>2018-08-17 21:18:17 +0000
commit89af71c7dd076663f4b8e7de7b1f79d4c1b2e14e (patch)
treedd762f550af5ab0a5ebefaecd880414d6ee04ab6 /src/northbridge/intel
parent9010140c6d5fc12eabe6f10332eaf0a1a02b40ca (diff)
sandybridge/raminit_common.c: fix printram statement
Change-Id: Iddea8cc71dc1fb33d46b22dd19e39bf1c1257555 Signed-off-by: Iru Cai <mytbk920423@gmail.com> Reviewed-on: https://review.coreboot.org/28117 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/northbridge/intel')
-rw-r--r--src/northbridge/intel/sandybridge/raminit_common.c13
1 files changed, 8 insertions, 5 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c
index d806066e91..a90b055bce 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.c
+++ b/src/northbridge/intel/sandybridge/raminit_common.c
@@ -195,7 +195,7 @@ void dram_xover(ramctr_timing * ctrl)
static void dram_odt_stretch(ramctr_timing *ctrl, int channel)
{
struct cpuid_result cpures;
- u32 cpu, stretch;
+ u32 addr, cpu, stretch;
stretch = ctrl->ref_card_offset[channel];
/* ODT stretch: Delay ODT signal by stretch value.
@@ -205,14 +205,17 @@ static void dram_odt_stretch(ramctr_timing *ctrl, int channel)
if (IS_SANDY_CPU(cpu) && IS_SANDY_CPU_C(cpu)) {
if (stretch == 2)
stretch = 3;
- MCHBAR32_AND_OR(0x401c + 0x400 * channel, 0xffffc3ff,
+ addr = 0x401c + 0x400 * channel;
+ MCHBAR32_AND_OR(addr, 0xffffc3ff,
(stretch << 12) | (stretch << 10));
- printram("OTHP Workaround [%x] = %x\n", addr, reg);
+ printk(RAM_DEBUG, "OTHP Workaround [%x] = %x\n", addr,
+ MCHBAR32(addr));
} else {
// OTHP
- MCHBAR32_AND_OR(0x400c + 0x400 * channel, 0xfff0ffff,
+ addr = 0x400c + 0x400 * channel;
+ MCHBAR32_AND_OR(addr, 0xfff0ffff,
(stretch << 16) | (stretch << 18));
- printram("OTHP [%x] = %x\n", addr, reg);
+ printk(RAM_DEBUG, "OTHP [%x] = %x\n", addr, MCHBAR32(addr));
}
}