diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2021-01-12 01:04:04 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-01-15 11:24:15 +0000 |
| commit | 89200d27868f68a32e09f5a4a3c264bf45b78e20 (patch) | |
| tree | fcd3217e3c15677211776654540213fde771dba9 /src/northbridge/intel | |
| parent | bda1c552e9acc4f6e1da44504343abb189590bb9 (diff) | |
nb/intel/sandybridge: Remove wrong and nonsense condition
Commit 7584e550cc (nb/intel/sandybridge: Clean up program_timings)
introduced this condition along with a comment that says the opposite.
Command and clock timings always need to be computed, so drop both the
nonsensical condition and the equally-worthless corresponding comment.
Change-Id: I509f0f6304bfb3e033c0c3ecd1dd5c9645e004b2
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49318
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel')
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_common.c | 53 |
1 files changed, 25 insertions, 28 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index eac0b50eed..092e34dd0a 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -954,42 +954,39 @@ void program_timings(ramctr_timing *ctrl, int channel) cmd_delay = CCC_MAX_PI; } - /* Apply control and clock delay if desired setting is positive */ - if (cmd_delay == 0) { - for (slot = 0; slot < NUM_SLOTS; slot++) { - const int pi_coding_0 = ctrl->timings[channel][2 * slot + 0].pi_coding; - const int pi_coding_1 = ctrl->timings[channel][2 * slot + 1].pi_coding; + for (slot = 0; slot < NUM_SLOTS; slot++) { + const int pi_coding_0 = ctrl->timings[channel][2 * slot + 0].pi_coding; + const int pi_coding_1 = ctrl->timings[channel][2 * slot + 1].pi_coding; - const u8 slot_map = (ctrl->rankmap[channel] >> (2 * slot)) & 3; + const u8 slot_map = (ctrl->rankmap[channel] >> (2 * slot)) & 3; - if (slot_map & 1) - ctl_delay[slot] += pi_coding_0 + cmd_delay; + if (slot_map & 1) + ctl_delay[slot] += pi_coding_0 + cmd_delay; - if (slot_map & 2) - ctl_delay[slot] += pi_coding_1 + cmd_delay; + if (slot_map & 2) + ctl_delay[slot] += pi_coding_1 + cmd_delay; - /* If both ranks in a slot are populated, use the average */ - if (slot_map == 3) - ctl_delay[slot] /= 2; + /* If both ranks in a slot are populated, use the average */ + if (slot_map == 3) + ctl_delay[slot] /= 2; - if (ctl_delay[slot] > CCC_MAX_PI) { - printk(BIOS_ERR, "C%dS%d control delay overflow: %d\n", - channel, slot, ctl_delay[slot]); - ctl_delay[slot] = CCC_MAX_PI; - } + if (ctl_delay[slot] > CCC_MAX_PI) { + printk(BIOS_ERR, "C%dS%d control delay overflow: %d\n", + channel, slot, ctl_delay[slot]); + ctl_delay[slot] = CCC_MAX_PI; } - FOR_ALL_POPULATED_RANKS { - u32 clk_delay = ctrl->timings[channel][slotrank].pi_coding + cmd_delay; - - if (clk_delay > CCC_MAX_PI) { - printk(BIOS_ERR, "C%dR%d clock delay overflow: %d\n", - channel, slotrank, clk_delay); - clk_delay = CCC_MAX_PI; - } + } + FOR_ALL_POPULATED_RANKS { + u32 clk_delay = ctrl->timings[channel][slotrank].pi_coding + cmd_delay; - clk_pi_coding |= (clk_delay % QCLK_PI) << (6 * slotrank); - clk_logic_dly |= (clk_delay / QCLK_PI) << slotrank; + if (clk_delay > CCC_MAX_PI) { + printk(BIOS_ERR, "C%dR%d clock delay overflow: %d\n", + channel, slotrank, clk_delay); + clk_delay = CCC_MAX_PI; } + + clk_pi_coding |= (clk_delay % QCLK_PI) << (6 * slotrank); + clk_logic_dly |= (clk_delay / QCLK_PI) << slotrank; } /* Enable CMD XOVER */ |