diff options
| author | Gabe Black <gabeblack@google.com> | 2013-09-26 23:21:57 -0700 |
|---|---|---|
| committer | Isaac Christensen <isaac.christensen@se-eng.com> | 2014-08-21 18:44:56 +0200 |
| commit | 4f3873d2cec66d1b72577e3c516287f356af3f23 (patch) | |
| tree | ef4c17265a216b6174e76286c3c5cab5b76f29c5 /src/northbridge/intel | |
| parent | cc95f189731907dc5847cd62b398217e6f9f91f0 (diff) | |
arm: Get rid of the INTERMEDIATE variable used on exynos.
The INTERMEDIATE variable was used to hook dd-ing the BL1 into the image for
Exynos SOCs, but we can do that directly without having a special hook.
Change-Id: I434506b52ca4ea1d01e25a785cbfe66dfdea21c4
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://chromium-review.googlesource.com/170921
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
(cherry picked from commit 8db03c387ad654227d064e2a7fa5ecf09d07e3c5)
Signed-off-by: Isaac Christensen <isaac.christensen@se-eng.com>
Reviewed-on: http://review.coreboot.org/6714
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: David Hendricks <dhendrix@chromium.org>
Diffstat (limited to 'src/northbridge/intel')
0 files changed, 0 insertions, 0 deletions