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author | Garmin Chang <Garmin.Chang@mediatek.com> | 2022-09-12 18:06:07 +0800 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-09-14 12:00:50 +0000 |
commit | 1fac2e20b8161e1dc93086b4c5498548827f1604 (patch) | |
tree | f3a089d855eef415fed51efe1e6a14c902ce7e46 /src/northbridge/intel/x4x | |
parent | f189249eb6562811e64a32ceb3c19d5dc7b7e9ea (diff) |
soc/mediatek/mt8188: Set PLLs to hardware default values
Some PLLs are not used in firmware, so we should keep them as hardware
default values. If their modules want to set them, the corresponding
drivers should set them in the kernel stage.
BUG=b:233720142
TEST=build pass.
Signed-off-by: Garmin Chang <Garmin.Chang@mediatek.com>
Change-Id: I9bee18005ffed7fc1785c7fd3c0370c8293064ad
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67547
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/x4x')
0 files changed, 0 insertions, 0 deletions