diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2019-03-01 13:43:02 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-01 20:32:15 +0000 |
| commit | f1b58b78351d7ed220673e688a2f7bc9e96da4e2 (patch) | |
| tree | d8aae223f0e426f189cb4750b972a31e09d46b88 /src/northbridge/intel/x4x | |
| parent | 44e89af6e609874f2f18d30f1e66dce8b5a98eff (diff) | |
device/pci: Fix PCI accessor headers
PCI config accessors are no longer indirectly included
from <arch/io.h> use <device/pci_ops.h> instead.
Change-Id: I2adf46430a33bc52ef69d1bf7dca4655fc8475bd
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/31675
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/northbridge/intel/x4x')
| -rw-r--r-- | src/northbridge/intel/x4x/bootblock.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/x4x/early_init.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/x4x/northbridge.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/x4x/ram_calc.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/x4x/raminit.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/x4x/raminit_ddr23.c | 1 |
6 files changed, 6 insertions, 0 deletions
diff --git a/src/northbridge/intel/x4x/bootblock.c b/src/northbridge/intel/x4x/bootblock.c index 9629d887c2..b470e955e1 100644 --- a/src/northbridge/intel/x4x/bootblock.c +++ b/src/northbridge/intel/x4x/bootblock.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include "iomap.h" #include "x4x.h" diff --git a/src/northbridge/intel/x4x/early_init.c b/src/northbridge/intel/x4x/early_init.c index c6eb38315b..9cb3df3565 100644 --- a/src/northbridge/intel/x4x/early_init.c +++ b/src/northbridge/intel/x4x/early_init.c @@ -16,6 +16,7 @@ #include <stdint.h> #include <arch/io.h> +#include <device/pci_ops.h> #include "iomap.h" #if IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801GX) #include <southbridge/intel/i82801gx/i82801gx.h> /* DEFAULT_PMBASE */ diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c index 4b5a754a1c..c168e38f51 100644 --- a/src/northbridge/intel/x4x/northbridge.c +++ b/src/northbridge/intel/x4x/northbridge.c @@ -17,6 +17,7 @@ #include <cbmem.h> #include <console/console.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <stdint.h> #include <device/device.h> #include <device/pci.h> diff --git a/src/northbridge/intel/x4x/ram_calc.c b/src/northbridge/intel/x4x/ram_calc.c index 6484326e57..ff3c31b4f5 100644 --- a/src/northbridge/intel/x4x/ram_calc.c +++ b/src/northbridge/intel/x4x/ram_calc.c @@ -22,6 +22,7 @@ #include <stdint.h> #include <arch/cpu.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <device/pci_def.h> #include <console/console.h> #include <cpu/intel/romstage.h> diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c index 1fd600484f..ea00f293e1 100644 --- a/src/northbridge/intel/x4x/raminit.c +++ b/src/northbridge/intel/x4x/raminit.c @@ -15,6 +15,7 @@ */ #include <arch/io.h> +#include <device/pci_ops.h> #include <cbmem.h> #include <console/console.h> #include <cpu/x86/cache.h> diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c index 5c5dafa644..ffa861eb66 100644 --- a/src/northbridge/intel/x4x/raminit_ddr23.c +++ b/src/northbridge/intel/x4x/raminit_ddr23.c @@ -17,6 +17,7 @@ #include <assert.h> #include <stdint.h> #include <arch/io.h> +#include <device/pci_ops.h> #include <console/console.h> #include <commonlib/helpers.h> #include <delay.h> |