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authorElyes Haouas <ehaouas@noos.fr>2022-10-30 06:55:21 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-11-04 00:56:44 +0000
commit649c8cb81c82286ee098107265b6627ccfe8100f (patch)
tree2a0256b00cb5235a05a6009459fd90a08ab10969 /src/northbridge/intel/x4x
parent9ee9cd30a2a5168e017cefc9c07a54cef6e03763 (diff)
nb/intel/x4x: Specify supported memory types
Change-Id: I07c24ece29616fa008da0935c3fe71e35f16ed2d Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/68998 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge/intel/x4x')
-rw-r--r--src/northbridge/intel/x4x/Kconfig5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig
index 5318623c05..a548df2ac9 100644
--- a/src/northbridge/intel/x4x/Kconfig
+++ b/src/northbridge/intel/x4x/Kconfig
@@ -13,6 +13,11 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS
select CACHE_MRC_SETTINGS
select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
select HAVE_EXP_X86_64_SUPPORT
+ select NO_DDR5
+ select NO_LPDDR4
+ select NO_DDR4
+ select USE_DDR3
+ select USE_DDR2
config CBFS_SIZE
default 0x100000 if !SOUTHBRIDGE_INTEL_I82801GX