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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-02-17 20:43:04 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2021-02-23 02:36:55 +0000
commit3051a9ecfa4796de3e60b22df808a61e20da3b43 (patch)
tree043c3214840919da4929776da71ea5f66e4c6250 /src/northbridge/intel/x4x
parentb33c6fbfd5f9050686b97f2fe3e4b94862a96a74 (diff)
nb/intel/x4x: Use a variable for s3resume
This helps towards unified chipset_power_state. Change-Id: I8f152dc9f1e0f26e4777489913e9fb2c9cd3dac0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50974 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge/intel/x4x')
-rw-r--r--src/northbridge/intel/x4x/raminit.c7
1 files changed, 5 insertions, 2 deletions
diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c
index 59abe4d1de..8ff0ffc19a 100644
--- a/src/northbridge/intel/x4x/raminit.c
+++ b/src/northbridge/intel/x4x/raminit.c
@@ -688,11 +688,14 @@ void sdram_initialize(int boot_path, const u8 *spd_map)
printk(BIOS_DEBUG, "RAM initialization finished.\n");
- cbmem_was_inited = !cbmem_recovery(s.boot_path == BOOT_PATH_RESUME);
+ int s3resume = boot_path == BOOT_PATH_RESUME;
+
+ cbmem_was_inited = !cbmem_recovery(s3resume);
if (!fast_boot)
mrc_cache_stash_data(MRC_TRAINING_DATA, MRC_CACHE_VERSION,
&s, sizeof(s));
- if (s.boot_path == BOOT_PATH_RESUME && !cbmem_was_inited) {
+
+ if (s3resume && !cbmem_was_inited) {
/* Failed S3 resume, reset to come up cleanly */
system_reset();
}