diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2019-11-11 21:56:37 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-11-15 18:06:27 +0000 |
| commit | 7843bd560e65b0a83e99b42bdd58dd6363656c56 (patch) | |
| tree | 0d411ba99ae94da46d3fccaf09f1208fc812bb6f /src/northbridge/intel/x4x/romstage.c | |
| parent | c583920a748fb8bd7999142433ad08641b06283d (diff) | |
nb/intel/x4x: Move to C_ENVIRONMENT_BOOTBLOCK
There is some overlap between things done in bootblock
and romstage like setting BARs.
Change-Id: Icd1de34c3b5c0f36f2a5249116d1829ee3956f38
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36759
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/x4x/romstage.c')
| -rw-r--r-- | src/northbridge/intel/x4x/romstage.c | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/src/northbridge/intel/x4x/romstage.c b/src/northbridge/intel/x4x/romstage.c index c3a503643f..eae87f3674 100644 --- a/src/northbridge/intel/x4x/romstage.c +++ b/src/northbridge/intel/x4x/romstage.c @@ -34,16 +34,6 @@ void mainboard_romstage_entry(void) u8 boot_path = 0; u8 s3_resume; -#if CONFIG(SOUTHBRIDGE_INTEL_I82801JX) - i82801jx_lpc_setup(); -#elif CONFIG(SOUTHBRIDGE_INTEL_I82801GX) - i82801gx_lpc_setup(); -#endif - - mb_lpc_setup(); - - console_init(); - enable_smbus(); #if CONFIG(SOUTHBRIDGE_INTEL_I82801JX) |