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authorAngel Pons <th3fanbus@gmail.com>2021-01-20 11:26:35 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-02-10 07:29:54 +0000
commite88f705946a1f8b18ff421c654a568581b1e969e (patch)
tree9b476bdbd17d70e47f228ab8459db50df0cadf14 /src/northbridge/intel/x4x/early_init.c
parent24b1d8af060fa0aabb8b127716ba5c5ed87f5edf (diff)
nb/intel/x4x: Use common {DMI,EP,MCH}BAR accessors
Tested with BUILD_TIMELESS=1, Asus P5QL PRO does not change. Change-Id: I33c17f56eac0277a12b32af777e2e1ceb086685f Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49754 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel/x4x/early_init.c')
-rw-r--r--src/northbridge/intel/x4x/early_init.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/northbridge/intel/x4x/early_init.c b/src/northbridge/intel/x4x/early_init.c
index 279a38fcd6..ea41e76dce 100644
--- a/src/northbridge/intel/x4x/early_init.c
+++ b/src/northbridge/intel/x4x/early_init.c
@@ -15,13 +15,13 @@
void x4x_early_init(void)
{
/* Setup MCHBAR. */
- pci_write_config32(HOST_BRIDGE, D0F0_MCHBAR_LO, (uintptr_t)DEFAULT_MCHBAR | 1);
+ pci_write_config32(HOST_BRIDGE, D0F0_MCHBAR_LO, CONFIG_FIXED_MCHBAR_MMIO_BASE | 1);
/* Setup DMIBAR. */
- pci_write_config32(HOST_BRIDGE, D0F0_DMIBAR_LO, (uintptr_t)DEFAULT_DMIBAR | 1);
+ pci_write_config32(HOST_BRIDGE, D0F0_DMIBAR_LO, CONFIG_FIXED_DMIBAR_MMIO_BASE | 1);
/* Setup EPBAR. */
- pci_write_config32(HOST_BRIDGE, D0F0_EPBAR_LO, DEFAULT_EPBAR | 1);
+ pci_write_config32(HOST_BRIDGE, D0F0_EPBAR_LO, CONFIG_FIXED_EPBAR_MMIO_BASE | 1);
/* Setup HECIBAR */
pci_write_config32(PCI_DEV(0, 3, 0), 0x10, DEFAULT_HECIBAR);