nb/intel/x4x/raminit: Rework receive enable calibration

Moves receive enable calibration to a separate file to lighten
raminit.c a bit.

Receive enable calibration is quite similar to gm45 so it reuses some
of its function names.

The functional changes are:
* the minimum coarse is now reset for each channel;
* on the second fine search for DQS high, TAP overflow is handled by
  increasing medium;
* start coarse at CAS + 1 instead of CAS - 1. Other Intel northbridges
  do the same and the results are more in line with register dumps
  from vendor bios.
These might improve stability.

TESTED on ga-g41m-es2l

Change-Id: I0c970455e609d3ce96a262cbf110336a2079da4d
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/18692
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

1 files changed, 1 insertions, 0 deletions

diff --git a/src/northbridge/intel/x4x/Makefile.inc b/src/northbridge/intel/x4x/Makefile.inc
index 34d9b0fdd7..5c64ca7e49 100644
--- a/src/northbridge/intel/x4x/Makefile.inc
+++ b/src/northbridge/intel/x4x/Makefile.inc
@@ -20,6 +20,7 @@ romstage-y += early_init.c
 romstage-y += raminit.c
 romstage-y += raminit_ddr2.c
 romstage-y += ram_calc.c
+romstage-y += rcven.c
 
 ramstage-y += acpi.c
 ramstage-y += ram_calc.c