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authorEdward O'Callaghan <eocallaghan@alterapraxis.com>2015-01-06 02:48:57 +1100
committerEdward O'Callaghan <eocallaghan@alterapraxis.com>2015-01-06 04:17:47 +0100
commit089a51029221ddceb0cf61daecb275971d2b2f22 (patch)
treecd6eabef84de3551e123c6429d11743d36fb93b3 /src/northbridge/intel/sch
parentebe3a7aea368aad5fe4b2bb625db34d0a542cb64 (diff)
northbridge/intel: Do not define include guard as 1
As `#ifndef` and not `#if` is used in the check for include guards, setting it to 1 is not needed. Change-Id: Iaa6c0f807b9e99ad3c9551abe4ab1627e5505d67 Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/8103 Reviewed-by: Marc Jones <marc.jones@se-eng.com> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/northbridge/intel/sch')
-rw-r--r--src/northbridge/intel/sch/sch.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/sch/sch.h b/src/northbridge/intel/sch/sch.h
index 5700842e90..3eb082585d 100644
--- a/src/northbridge/intel/sch/sch.h
+++ b/src/northbridge/intel/sch/sch.h
@@ -20,7 +20,7 @@
*/
#ifndef __SCH_PULSBO_H__
-#define __SCH_PULSBO_H__ 1
+#define __SCH_PULSBO_H__
int sch_port_access_read(int port, int reg, int bytes);
void sch_port_access_write(int port, int reg, int bytes, long data);
@@ -51,4 +51,4 @@ void sch_port_access_write_ram_cmd(int cmd, int port, int reg, int data);
/* FIXME: should probably be in southbridge, but is setup in romstage, too */
#define CMC_SHADOW 0x3faf0000
-#endif
+#endif /* __SCH_PULSBO_H__ */