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authorNico Huber <nico.h@gmx.de>2018-01-14 12:34:43 +0100
committerMartin Roth <martinroth@google.com>2018-01-23 05:25:41 +0000
commitff4025c5f789b80e6552dd887c34c34642a98c64 (patch)
tree852784fb6548c414d41dbdc93f4de6b5b191f9a6 /src/northbridge/intel/sandybridge
parent101485c73dbb7eb8d89fbfda1c1bf9a5e495b536 (diff)
sb/intel/bd82x6x: Reduce function-disable mess
Most affected boards set the function disabled (FD) register to an arbitrary state dumped from systems running the vendor BIOS. This makes it impossible to enable the devices in devicetree and a pretty big mess of course because nobody cared to keep the register in sync with the devicetree. To get completely rid of most of the writes to FD, move setting of PCH_DISABLE_ALWAYS into the southbridge code where it belongs. Change-Id: Ia2a507cbcdf218d09738e2e16f0d3ad1dcf57b8b Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/23255 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hal Martin <hal.martin+coreboot@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Bill XIE <persmule@gmail.com> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge/intel/sandybridge')
-rw-r--r--src/northbridge/intel/sandybridge/romstage.c3
-rw-r--r--src/northbridge/intel/sandybridge/sandybridge.h1
2 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c
index 4c596539de..0426b831e7 100644
--- a/src/northbridge/intel/sandybridge/romstage.c
+++ b/src/northbridge/intel/sandybridge/romstage.c
@@ -110,7 +110,8 @@ void mainboard_romstage_entry(unsigned long bist)
post_code(0x3c);
southbridge_configure_default_intmap();
- rcba_config();
+ southbridge_rcba_config();
+ mainboard_rcba_config();
post_code(0x3d);
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h
index dd1a58cbc3..1f56585315 100644
--- a/src/northbridge/intel/sandybridge/sandybridge.h
+++ b/src/northbridge/intel/sandybridge/sandybridge.h
@@ -220,7 +220,6 @@ void report_platform_info(void);
#endif /* !__SMM__ */
-void rcba_config(void);
void pch_enable_lpc(void);
void mainboard_early_init(int s3resume);
void mainboard_config_superio(void);