diff options
| author | Alexander Couzens <lynxis@fe80.eu> | 2016-03-09 03:13:45 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-03-11 18:56:21 +0100 |
| commit | 81c5c761b305dd62019759e5e39248b02c0af820 (patch) | |
| tree | 25aa975422c72af95b419b5768e53749a06ff458 /src/northbridge/intel/sandybridge | |
| parent | 013accca7fb955dd04ee8a51d98e3d94a4941346 (diff) | |
northbridge/intel: move mrc_cache definition into a common header
The mrc_cache definition and the struct mrc_container are the same
over all intel platforms.
Change-Id: I128a4b5693d27ead709325c597ffe68a0cc78bab
Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
Reviewed-on: https://review.coreboot.org/13998
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/intel/sandybridge')
| -rw-r--r-- | src/northbridge/intel/sandybridge/mrccache.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_mrc.c | 1 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/sandybridge.h | 13 |
4 files changed, 4 insertions, 12 deletions
diff --git a/src/northbridge/intel/sandybridge/mrccache.c b/src/northbridge/intel/sandybridge/mrccache.c index 37bca8564b..f243c27464 100644 --- a/src/northbridge/intel/sandybridge/mrccache.c +++ b/src/northbridge/intel/sandybridge/mrccache.c @@ -24,6 +24,7 @@ #include <cbmem.h> #include "pei_data.h" #include "sandybridge.h" +#include <northbridge/intel/common/mrc_cache.h> #include <spi-generic.h> #include <spi_flash.h> diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index 1527ec34cc..0b27fe5524 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -26,6 +26,7 @@ #include <ip_checksum.h> #include <timestamp.h> #include <pc80/mc146818rtc.h> +#include <northbridge/intel/common/mrc_cache.h> #include <device/pci_def.h> #include <memory_info.h> #include <smbios.h> diff --git a/src/northbridge/intel/sandybridge/raminit_mrc.c b/src/northbridge/intel/sandybridge/raminit_mrc.c index 162caf6107..c26f012ff3 100644 --- a/src/northbridge/intel/sandybridge/raminit_mrc.c +++ b/src/northbridge/intel/sandybridge/raminit_mrc.c @@ -24,6 +24,7 @@ #include <ip_checksum.h> #include <pc80/mc146818rtc.h> #include <device/pci_def.h> +#include <northbridge/intel/common/mrc_cache.h> #include <halt.h> #include <timestamp.h> #include "raminit.h" diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h index ba8f8d9ae7..116e0a8c7f 100644 --- a/src/northbridge/intel/sandybridge/sandybridge.h +++ b/src/northbridge/intel/sandybridge/sandybridge.h @@ -235,18 +235,7 @@ struct acpi_rsdp; unsigned long northbridge_write_acpi_tables(device_t device, unsigned long start, struct acpi_rsdp *rsdp); #endif - -#define MRC_DATA_ALIGN 0x1000 -#define MRC_DATA_SIGNATURE (('M'<<0)|('R'<<8)|('C'<<16)|('D'<<24)) - -struct mrc_data_container { - u32 mrc_signature; // "MRCD" - u32 mrc_data_size; // Actual total size of this structure - u32 mrc_checksum; // IP style checksum - u32 reserved; // For header alignment - u8 mrc_data[0]; // Variable size, platform/run time dependent. -} __attribute__ ((packed)); - +struct mrc_data_container; struct mrc_data_container *find_current_mrc_cache(void); #if !defined(__PRE_RAM__) #include "gma.h" |