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authorAngel Pons <th3fanbus@gmail.com>2021-04-24 10:53:19 +0200
committerNico Huber <nico.h@gmx.de>2024-04-13 10:53:42 +0000
commit6f75dd0fd0c6a9eac570ead978a6da67d8e65aa7 (patch)
treeb787eaa27b807b7cc6df4c706c32b7a4b2a32fbe /src/northbridge/intel/sandybridge
parentb7341da19133991efd29880849bdaab29a6e243d (diff)
sandybridge,haswell,broadwell: Use DIV_ROUND_CLOSEST macro
Integer division in C truncates toward zero. When the dividend and the divisor are positive, one can add half of the divisor to the dividend to round the division result towards the closest integer. We already have a macro in commonlib to do just that, so put it to good use. Tested with BUILD_TIMELESS=1, coreboot images for the Asus P8Z77-V LX2 and the Asrock B85M Pro4 do not change. Change-Id: I251af82da15049a3a2aa6ea712ae8c9fe859caf6 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/52651 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Benjamin Doron <benjamin.doron00@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/sandybridge')
-rw-r--r--src/northbridge/intel/sandybridge/raminit_shared.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_shared.c b/src/northbridge/intel/sandybridge/raminit_shared.c
index 543d285e9b..8ba20ac6a8 100644
--- a/src/northbridge/intel/sandybridge/raminit_shared.c
+++ b/src/northbridge/intel/sandybridge/raminit_shared.c
@@ -29,7 +29,7 @@ void report_memory_config(void)
printk(BIOS_DEBUG, "memcfg DDR3 ref clock %d MHz\n", refclk);
printk(BIOS_DEBUG, "memcfg DDR3 clock %d MHz\n",
- (mchbar_read32(MC_BIOS_DATA) * refclk * 100 * 2 + 50) / 100);
+ DIV_ROUND_CLOSEST(mchbar_read32(MC_BIOS_DATA) * refclk * 100 * 2, 100));
printk(BIOS_DEBUG, "memcfg channel assignment: A: %d, B % d, C % d\n",
(addr_decoder_common >> 0) & 3,