diff options
| author | Martin Roth <martinroth@google.com> | 2016-11-18 09:29:03 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-11-21 23:43:54 +0100 |
| commit | 128c104c4d3b91d3371b03840af460d776af819d (patch) | |
| tree | bb0621ae2c90b512948ba9fee350cf42a49f4db3 /src/northbridge/intel/sandybridge | |
| parent | c6ec8dd1cb2303f7f7a71f0f494a6fc30b93dff4 (diff) | |
nb/intel: Fix some spelling mistakes in comments and strings
Change-Id: I4a8297397d878e38516c8df19dd311c7ef19ec06
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/17478
Tested-by: build bot (Jenkins)
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel/sandybridge')
| -rw-r--r-- | src/northbridge/intel/sandybridge/gma.c | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c | 2 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit.c | 4 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/romstage.c | 2 |
5 files changed, 6 insertions, 6 deletions
diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c index 1f5251144b..290d066b36 100644 --- a/src/northbridge/intel/sandybridge/gma.c +++ b/src/northbridge/intel/sandybridge/gma.c @@ -249,7 +249,7 @@ static const struct gt_powermeter ivb_pm_gt2_35w[] = { /* some vga option roms are used for several chipsets but they only have one * PCI ID in their header. If we encounter such an option rom, we need to do - * the mapping ourselfes + * the mapping ourselves */ u32 map_oprom_vendev(u32 vendev) diff --git a/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c b/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c index 489dbc79ad..bcdeaa074a 100644 --- a/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c +++ b/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c @@ -252,7 +252,7 @@ int i915lightup_ivy(const struct i915_gpu_controller_info *info, u32 current_delta; denom = candn * candp1 * 7; - /* Doesnt overflow for up to + /* Doesn't overflow for up to 5000000 kHz = 5 GHz. */ m = (target_frequency * denom + 60000) / 120000; diff --git a/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c b/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c index df1e8a8241..e39e6bc2d0 100644 --- a/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c +++ b/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c @@ -237,7 +237,7 @@ int i915lightup_sandy(const struct i915_gpu_controller_info *info, u32 current_delta; denom = candn * candp1 * 7; - /* Doesnt overflow for up to + /* Doesn't overflow for up to 5000000 kHz = 5 GHz. */ m = (target_frequency * denom + 60000) / 120000; diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index f3a1ba5f41..d06e929384 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -71,7 +71,7 @@ * * DEFAULT_MCHBAR + 0x4230 + 0x400 * X + 4 * Y: idle register * Controls the idle time after issuing this DRAM command - * Bit 16-32: number of clock-cylces to idle + * Bit 16-32: number of clock-cycles to idle * * DEFAULT_MCHBAR + 0x4284 + 0x400 * channel: execute command queue * Starts to execute all queued commands @@ -835,7 +835,7 @@ static void dram_freq(ramctr_timing * ctrl) die ("No lock frequency found"); } - /* Frequency mulitplier. */ + /* Frequency multiplier. */ u32 FRQ = get_FRQ(ctrl->tCK); /* The PLL will never lock if the required frequency is diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c index a2ca1c1835..738e2851af 100644 --- a/src/northbridge/intel/sandybridge/romstage.c +++ b/src/northbridge/intel/sandybridge/romstage.c @@ -72,7 +72,7 @@ void mainboard_romstage_entry(unsigned long bist) /* Initialize superio */ mainboard_config_superio(); - /* USB is inited in MRC if MRC is used. */ + /* USB is initialized in MRC if MRC is used. */ if (CONFIG_USE_NATIVE_RAMINIT) { early_usb_init(mainboard_usb_ports); } |