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authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-01-23 16:15:48 +0200
committerNico Huber <nico.h@gmx.de>2019-03-06 11:53:56 +0000
commite079e5ccc2e707e5b6bd3b011e04c9138f159808 (patch)
treeed42a3f97712d440debed515776d4a7e3587305a /src/northbridge/intel/sandybridge
parentad7758ca521bab7f1aaa0977516002f905cc0a67 (diff)
device/pci_ops: Inline PCI config accessors for ramstage
Inlining here allows the check for (dev != NULL) to be optimised and evaluated just once inside the calling function body. Change-Id: I0b5b4f4adb8eaa483a31353324da19917db85f4a Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31751 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel/sandybridge')
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