diff options
| author | Martin Roth <martinroth@chromium.org> | 2020-11-18 09:20:01 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2020-11-20 19:30:48 +0000 |
| commit | cdd7d18120a1a76df4a9f8d78391c7018013d916 (patch) | |
| tree | 59a7a7cfb1b0a9bf7dd6788b6109ea4b3fc5278e /src/northbridge/intel/sandybridge | |
| parent | 5b47d77047fbe42c8ab5ce63fbb26aee4899a8e5 (diff) | |
mb/google/zork: Remove 50ms WIFI delay
As a part of trying to get our boot time as low as possible, any delays
in the code should try to be refactored out. This removes the 50ms
delay in the WIFI sequence by enabling power and putting the wifi module
into reset in bootblock, then bringing it out of reset in ramstage.
This is significantly longer than the 50ms requirement. The reset GPIO
was already being set high in ramstage, so that code didn't need to be
added.
BUG=b:171513520
TEST=Boot on boards with different module types, WIFI works on both.
BRANCH=Zork
Signed-off-by: Martin Roth <martinroth@chromium.org>
Change-Id: I211d3da338ad368d1f011f03cf7d05121c057075
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47719
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/northbridge/intel/sandybridge')
0 files changed, 0 insertions, 0 deletions