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authorMarshall Dawson <marshall.dawson@amd.corp-partner.google.com>2020-04-23 06:43:44 -0600
committerFelix Held <felix-coreboot@felixheld.de>2020-05-27 19:20:03 +0000
commit5c5049e2832d2a6869a075e44966e0525dae5fab (patch)
treeca92bef2bb7050b9cd2168006dcd8022f261ec90 /src/northbridge/intel/sandybridge
parent030d21473894b0e1d4a19dd74cfb42f5c5a3db7b (diff)
soc/amd/picasso: Add generic SMU service request
Add a new feature that allows messages to be sent to the SMU. The offsets of the PCI config index/data indirect registers have been documented for prior generation devices. The index/data pair is used to access a command register, a response, and six argument values. BUG=b:153264473 TEST=Verify service can be used to take the system into S3 Change-Id: Ide431aa976cb2f8bdc248cb08aa0724a9596ac5a Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://chromium-review.googlesource.com/2161796 Reviewed-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41625 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
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