diff options
author | Angel Pons <th3fanbus@gmail.com> | 2020-03-22 12:23:35 +0100 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-23 19:25:00 +0000 |
commit | 5c1baf5bece75de2e396e3f37cfffba310cdf4cd (patch) | |
tree | abcf07da532f2438b0b7250092b7a3ba0c54b49a /src/northbridge/intel/sandybridge | |
parent | 2b5c1e73a57642a3289f19ae061acc0ddbb56d7d (diff) |
nb/intel/sandybridge: Add warning to saved structs
When changing any of the structures that are cached in non-volatile
storage, it is necessary to bump MRC_CACHE_VERSION so that the old
information is not misinterpreted.
Change-Id: Idefbc38b3a8198b1b5909e775b3c289db689fc0c
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39756
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/sandybridge')
-rw-r--r-- | src/northbridge/intel/sandybridge/raminit.c | 2 | ||||
-rw-r--r-- | src/northbridge/intel/sandybridge/raminit_common.h | 8 |
2 files changed, 8 insertions, 2 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index 34fb499599..dc999138f7 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -33,8 +33,6 @@ #include "raminit_common.h" #include "sandybridge.h" -#define MRC_CACHE_VERSION 1 - /* FIXME: no ECC support */ /* FIXME: no support for 3-channel chipsets */ diff --git a/src/northbridge/intel/sandybridge/raminit_common.h b/src/northbridge/intel/sandybridge/raminit_common.h index 516d8f5557..18a69af96f 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.h +++ b/src/northbridge/intel/sandybridge/raminit_common.h @@ -41,15 +41,22 @@ performant and even 1 seems to be enough in practice. */ #define NUM_PATTERNS 4 +/* + * WARNING: Do not forget to increase MRC_CACHE_VERSION when the saved data is changed! + */ +#define MRC_CACHE_VERSION 1 + typedef struct odtmap_st { u16 rttwr; u16 rttnom; } odtmap; +/* WARNING: Do not forget to increase MRC_CACHE_VERSION when this struct is changed! */ typedef struct dimm_info_st { dimm_attr dimm[NUM_CHANNELS][NUM_SLOTS]; } dimm_info; +/* WARNING: Do not forget to increase MRC_CACHE_VERSION when this struct is changed! */ struct ram_rank_timings { /* ROUNDT_LAT register: One byte per slotrank */ u8 roundtrip_latency; @@ -72,6 +79,7 @@ struct ram_rank_timings { } lanes[NUM_LANES]; }; +/* WARNING: Do not forget to increase MRC_CACHE_VERSION when this struct is changed! */ typedef struct ramctr_timing_st { u16 spd_crc[NUM_CHANNELS][NUM_SLOTS]; int sandybridge; |