diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2018-08-09 11:31:51 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2018-08-22 18:26:14 +0000 |
| commit | e6c8f7ec200e72c76eb2ff73720acff9c88e73c8 (patch) | |
| tree | 1db722038859476c1bb597ebee785bf6d5b1118b /src/northbridge/intel/sandybridge | |
| parent | db2f91b1f7924ce3953358045d17d2e328887a6b (diff) | |
nb/intel/*/gma.c: Skip NGI when VGA decode is not enabled
Writes to VGA MEM and IO by NGI are invalid if the IGD is not decoding
them.
Change-Id: I4b9329d14105eb563a0d4aea6ef75ff11febf6df
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/27984
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/northbridge/intel/sandybridge')
| -rw-r--r-- | src/northbridge/intel/sandybridge/gma.c | 43 |
1 files changed, 26 insertions, 17 deletions
diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c index 73546ce985..042c2a9da5 100644 --- a/src/northbridge/intel/sandybridge/gma.c +++ b/src/northbridge/intel/sandybridge/gma.c @@ -631,29 +631,38 @@ static void gma_func0_init(struct device *dev) /* Post VBIOS init */ gma_pm_init_post_vbios(dev); + int vga_disable = (pci_read_config16(dev, GGC) & 2) >> 1; + /* Running graphics init on S3 breaks Linux drm driver. */ if (!acpi_is_wakeup_s3() && (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) || IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT))) { - /* This should probably run before post VBIOS init. */ - printk(BIOS_SPEW, "Initializing VGA without OPROM.\n"); - u8 *mmiobase; - u32 iobase, physbase, graphics_base; - struct northbridge_intel_sandybridge_config *conf = dev->chip_info; - iobase = dev->resource_list[2].base; - mmiobase = res2mmio(&dev->resource_list[0], 0, 0); - physbase = pci_read_config32(dev, 0x5c) & ~0xf; - graphics_base = dev->resource_list[1].base; - - int lightup_ok; - if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) { - gma_gfxinit(&lightup_ok); + if (vga_disable) { + printk(BIOS_INFO, + "IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n"); } else { - lightup_ok = i915lightup_sandy(&conf->gfx, physbase, - iobase, mmiobase, graphics_base); + /* This should probably run before post VBIOS init. */ + printk(BIOS_SPEW, "Initializing VGA without OPROM.\n"); + u8 *mmiobase; + u32 iobase, physbase, graphics_base; + struct northbridge_intel_sandybridge_config *conf = dev->chip_info; + iobase = dev->resource_list[2].base; + mmiobase = res2mmio(&dev->resource_list[0], 0, 0); + physbase = pci_read_config32(dev, 0x5c) & ~0xf; + graphics_base = dev->resource_list[1].base; + + int lightup_ok; + if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) { + gma_gfxinit(&lightup_ok); + } else { + lightup_ok = i915lightup_sandy(&conf->gfx, + physbase, + iobase, mmiobase, + graphics_base); + } + if (lightup_ok) + gfx_set_init_done(1); } - if (lightup_ok) - gfx_set_init_done(1); } gma_enable_swsci(); |