diff options
| author | Nico Huber <nico.h@gmx.de> | 2017-05-20 16:46:01 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-06-04 18:47:19 +0200 |
| commit | 6d8266b91d7c8338350f7f8b81c21d10c97aceb6 (patch) | |
| tree | 9b10087e4cd90b56fbe1474c46958b2e3286b30d /src/northbridge/intel/sandybridge | |
| parent | 49d99fcebc7c3860def51812c2f723ad3e8a4ea3 (diff) | |
Kconfig: Add choice of framebuffer mode
Rename `FRAMEBUFFER_KEEP_VESA_MODE` to `LINEAR_FRAMEBUFFER` and put
it together with new `VGA_TEXT_FRAMEBUFFER` into a choice. There are
two versions of `LINEAR_FRAMEBUFFER` that differ only in the prompt
and help text (one for `HAVE_VBE_LINEAR_FRAMEBUFFER` and one for
`HAVE_LINEAR_FRAMEBUFFER`). Due to `kconfig_lint` we have to model
that with additional symbols.
Change-Id: I9144351491a14d9bb5e650c14933b646bc83fab0
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/19804
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/northbridge/intel/sandybridge')
| -rw-r--r-- | src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c | 12 | ||||
| -rw-r--r-- | src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c | 12 |
2 files changed, 12 insertions, 12 deletions
diff --git a/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c b/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c index bcdeaa074a..cad5078dc3 100644 --- a/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c +++ b/src/northbridge/intel/sandybridge/gma_ivybridge_lvds.c @@ -217,7 +217,7 @@ int i915lightup_ivy(const struct i915_gpu_controller_info *info, u32 pixel_m2 = 1; vga_textmode_init(); - if (IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)) { + if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER)) { vga_sr_write(1, 1); vga_sr_write(0x2, 0xf); vga_sr_write(0x3, 0x0); @@ -387,7 +387,7 @@ int i915lightup_ivy(const struct i915_gpu_controller_info *info, write32(mmio + 0xf0008, 0); - if (IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)) { + if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER)) { write32(mmio + PIPESRC(0), ((hactive - 1) << 16) | (vactive - 1)); write32(mmio + PF_CTL(0),0); write32(mmio + PF_WIN_SZ(0), 0); @@ -408,7 +408,7 @@ int i915lightup_ivy(const struct i915_gpu_controller_info *info, link_train(mmio); - if (IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)) + if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER)) write32(mmio+CPU_VGACNTRL,0x298e | VGA_DISP_DISABLE); else write32(mmio+CPU_VGACNTRL,0x298e); @@ -419,7 +419,7 @@ int i915lightup_ivy(const struct i915_gpu_controller_info *info, mdelay(1); read32(mmio + 0x000f0014); // = 0x00000600 - if (IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)) { + if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER)) { write32(mmio + DSPCNTR(0), DISPLAY_PLANE_ENABLE | DISPPLANE_BGRX888); mdelay(1); @@ -451,7 +451,7 @@ int i915lightup_ivy(const struct i915_gpu_controller_info *info, mdelay(1); - if (IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)) + if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER)) write32(mmio + PCH_TRANSCONF(0), TRANS_ENABLE | TRANS_6BPC | TRANS_STATE_MASK); else @@ -490,7 +490,7 @@ int i915lightup_ivy(const struct i915_gpu_controller_info *info, write32(mmio + DEIIR, 0xffffffff); write32(mmio + SDEIIR, 0xffffffff); - if (IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)) { + if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER)) { memset ((void *) lfb, 0, edid.x_resolution * edid.y_resolution * 4); set_vbe_mode_info_valid(&edid, lfb); diff --git a/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c b/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c index e39e6bc2d0..c3139a99dd 100644 --- a/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c +++ b/src/northbridge/intel/sandybridge/gma_sandybridge_lvds.c @@ -200,7 +200,7 @@ int i915lightup_sandy(const struct i915_gpu_controller_info *info, target_frequency = mode->lvds_dual_channel ? mode->pixel_clock : (2 * mode->pixel_clock); - if (IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)) { + if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER)) { vga_sr_write(1, 1); vga_sr_write(0x2, 0xf); vga_sr_write(0x3, 0x0); @@ -361,7 +361,7 @@ int i915lightup_sandy(const struct i915_gpu_controller_info *info, write32(mmio + PIPECONF(0), PIPECONF_DISABLE); write32(mmio + PF_WIN_POS(0), 0); - if (IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)) { + if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER)) { write32(mmio + PIPESRC(0), ((hactive - 1) << 16) | (vactive - 1)); write32(mmio + PF_CTL(0),0); write32(mmio + PF_WIN_SZ(0), 0); @@ -388,14 +388,14 @@ int i915lightup_sandy(const struct i915_gpu_controller_info *info, write32(mmio + PIPECONF(0), PIPECONF_BPP_6 | PIPECONF_DITHER_EN); write32(mmio + PIPECONF(0), PIPECONF_ENABLE | PIPECONF_BPP_6 | PIPECONF_DITHER_EN); - if (IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)) + if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER)) write32(mmio + CPU_VGACNTRL, 0x20298e | VGA_DISP_DISABLE); else write32(mmio + CPU_VGACNTRL, 0x20298e); train_link(mmio); - if (IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)) { + if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER)) { write32(mmio + DSPCNTR(0), DISPLAY_PLANE_ENABLE | DISPPLANE_BGRX888); mdelay(1); } @@ -424,7 +424,7 @@ int i915lightup_sandy(const struct i915_gpu_controller_info *info, write32(mmio + 0x000f000c, 0x801a2350); mdelay(1); - if (IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)) + if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER)) write32(mmio + TRANSCONF(0), TRANS_ENABLE | TRANS_6BPC | TRANS_STATE_MASK); else @@ -462,7 +462,7 @@ int i915lightup_sandy(const struct i915_gpu_controller_info *info, write32(mmio + DEIIR, 0xffffffff); write32(mmio + SDEIIR, 0xffffffff); - if (IS_ENABLED(CONFIG_FRAMEBUFFER_KEEP_VESA_MODE)) { + if (IS_ENABLED(CONFIG_LINEAR_FRAMEBUFFER)) { memset ((void *) lfb, 0, edid.x_resolution * edid.y_resolution * 4); set_vbe_mode_info_valid(&edid, lfb); |