diff options
author | Stefan Reinauer <reinauer@chromium.org> | 2013-07-29 13:00:03 -0700 |
---|---|---|
committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-08-29 00:52:41 +0200 |
commit | 3c46ca33a1c878beee839beb658fd93e8d3312a7 (patch) | |
tree | b09743bf4efa1f901b4bd3d27637b3c4d61c10c3 /src/northbridge/intel/sandybridge | |
parent | 12ba1978baa4738125b576888e435d7c2a3eeb8d (diff) |
Sandybridge/Ivybridge: Unify and fix Kconfig defaults
Change-Id: Ia4a5530e6a1a1fd2dec6f348ff163b5c7a8cd4cd
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/3830
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/sandybridge')
-rw-r--r-- | src/northbridge/intel/sandybridge/Kconfig | 53 |
1 files changed, 2 insertions, 51 deletions
diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig index 1834b7126b..5b6285fcfe 100644 --- a/src/northbridge/intel/sandybridge/Kconfig +++ b/src/northbridge/intel/sandybridge/Kconfig @@ -31,7 +31,7 @@ config NORTHBRIDGE_INTEL_IVYBRIDGE select MMCONF_SUPPORT_DEFAULT select CPU_INTEL_MODEL_306AX -if NORTHBRIDGE_INTEL_SANDYBRIDGE +if NORTHBRIDGE_INTEL_SANDYBRIDGE || NORTHBRIDGE_INTEL_IVYBRIDGE config VGA_BIOS_ID string @@ -39,53 +39,8 @@ config VGA_BIOS_ID config CACHE_MRC_SIZE_KB int - default 256 - -# FIXME: build from rom size -config MRC_CACHE_BASE - hex - default 0xff800000 - -config MRC_CACHE_LOCATION - hex - depends on !CHROMEOS - default 0x1ec000 - -config MRC_CACHE_SIZE - hex - depends on !CHROMEOS - default 0x10000 - -config DCACHE_RAM_BASE - hex - default 0xff7f0000 - -config DCACHE_RAM_SIZE - hex - default 0x10000 - -endif - -if NORTHBRIDGE_INTEL_IVYBRIDGE - -config VGA_BIOS_ID - string - default "8086,0166" - -config CACHE_MRC_SIZE_KB - int default 512 -# FIXME: build from rom size -config MRC_CACHE_BASE - hex - default 0xff800000 - -config MRC_CACHE_LOCATION - hex - depends on !CHROMEOS - default 0x370000 - config MRC_CACHE_SIZE hex depends on !CHROMEOS @@ -99,10 +54,6 @@ config DCACHE_RAM_SIZE hex default 0x20000 -endif - -if NORTHBRIDGE_INTEL_SANDYBRIDGE || NORTHBRIDGE_INTEL_IVYBRIDGE - config BOOTBLOCK_NORTHBRIDGE_INIT string default "northbridge/intel/sandybridge/bootblock.c" @@ -122,7 +73,7 @@ config HAVE_MRC config MRC_FILE string "Intel System Agent path and filename" depends on HAVE_MRC - default "systemagent-r6.bin" + default "3rdparty/northbridge/intel/sandybridge/systemagent-r6.bin" help The path and filename of the file to use as System Agent binary. |