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authorAngel Pons <th3fanbus@gmail.com>2021-03-26 13:08:23 +0100
committerNico Huber <nico.h@gmx.de>2021-04-10 15:54:25 +0000
commit0acfe22380cb4046a5c1965bd53a95a7d376ab5c (patch)
tree82e2bb6f52cc344b2f6884846a23876d100301ed /src/northbridge/intel/sandybridge
parent66780a0c9f4f00d6764d3090691a1c18d2e47dc5 (diff)
nb/intel: Replace remaining BAR accessors
These changes are not reproducible for some reason. Change-Id: I43b445b8af8871db87fb86747db8a35cec75716a Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51867 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/sandybridge')
-rw-r--r--src/northbridge/intel/sandybridge/northbridge.c7
1 files changed, 1 insertions, 6 deletions
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c
index 6e954611e1..bd4d1078da 100644
--- a/src/northbridge/intel/sandybridge/northbridge.c
+++ b/src/northbridge/intel/sandybridge/northbridge.c
@@ -210,8 +210,6 @@ static void northbridge_dmi_init(struct device *dev)
const u8 stepping = cpu_stepping();
- u32 reg32;
-
/* Steps prior to DMI ASPM */
if (is_sandy) {
dmibar_clrsetbits32(0x250, 7 << 20, 2 << 20);
@@ -224,10 +222,7 @@ static void northbridge_dmi_init(struct device *dev)
}
if (!is_sandy || stepping >= SNB_STEP_D1) {
- reg32 = dmibar_read32(0x1f8);
- reg32 &= ~(1 << 26);
- reg32 |= (1 << 16);
- dmibar_write32(0x1f8, reg32);
+ dmibar_clrsetbits32(0x1f8, 1 << 26, 1 << 16);
dmibar_setbits32(0x1fc, 1 << 12 | 1 << 23);