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author | Vladimir Serbinenko <phcoder@gmail.com> | 2016-03-04 09:31:14 +0100 |
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committer | Vladimir Serbinenko <phcoder@gmail.com> | 2016-03-05 00:57:22 +0100 |
commit | 42f42ff4501cf0ec345b7f9a3c850934e6f04c00 (patch) | |
tree | 1f82bc3d6aed8234cab72e92391ef1ddb3db6c98 /src/northbridge/intel/sandybridge | |
parent | ca1b2d19a9ba4363fa0586c9d23602a712fc27ea (diff) |
Hide EC_GOOGLE_CHROMEEC_SPI_BUS.
It's mobo architecture, not a user-adjustable setting.
Change-Id: I8bb81638f391cf0ba880801e4707d8f0957897c8
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: https://review.coreboot.org/13906
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/intel/sandybridge')
0 files changed, 0 insertions, 0 deletions