diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2019-12-28 18:09:47 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2019-12-29 12:19:14 +0000 |
| commit | 4902fee4412eb15bee5f5e164302730de0ce195e (patch) | |
| tree | 505f51579902c768bdef21d22559e0cc79c5e809 /src/northbridge/intel/sandybridge/sandybridge.h | |
| parent | cf425783c8896173a74103bd4936d0c205954f83 (diff) | |
nb/intel/sandybridge: add and use defines for PCI_DEV(0,0,0) registers
This patch didn't change the resulting binary for an X230 when using
TIMELESS_BUILD=1
Change-Id: Ibeb10c3e0c04dec76892a86fa39e60543b2ee2f5
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37969
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
Diffstat (limited to 'src/northbridge/intel/sandybridge/sandybridge.h')
| -rw-r--r-- | src/northbridge/intel/sandybridge/sandybridge.h | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h index dff943dd92..54fa66f2f6 100644 --- a/src/northbridge/intel/sandybridge/sandybridge.h +++ b/src/northbridge/intel/sandybridge/sandybridge.h @@ -79,6 +79,9 @@ enum platform_type { #define DEVEN_PEG12 (1 << 1) #define DEVEN_HOST (1 << 0) +#define PAVPC 0x58 /* Protected Audio Video Path Control */ +#define DPR 0x5c /* DMA Protected Range */ + #define PAM0 0x80 #define PAM1 0x81 #define PAM2 0x82 @@ -90,10 +93,13 @@ enum platform_type { #define LAC 0x87 /* Legacy Access Control */ #define SMRAM 0x88 /* System Management RAM Control */ +#define REMAPBASE 0x90 +#define REMAPLIMIT 0x98 #define TOM 0xa0 #define TOUUD 0xa8 /* Top of Upper Usable DRAM */ +#define BDSM 0xb0 /* Base Data of Stolen Memory */ #define BGSM 0xb4 /* Base GTT Stolen Memory */ -#define TSEG 0xb8 /* TSEG base */ +#define TSEGMB 0xb8 /* TSEG Memory Base */ #define TOLUD 0xbc /* Top of Low Used Memory */ #define CAPID0_A 0xe4 /* Capabilities Register A */ |