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authorFelix Held <felix-coreboot@felixheld.de>2020-01-26 01:02:00 +0100
committerFelix Held <felix-coreboot@felixheld.de>2020-02-01 18:31:08 +0000
commit99035650aaf4efe579cab0a6dd4aac2b0288f874 (patch)
tree2a602c3b9435f94d6a98aad495ce46bf1103531b /src/northbridge/intel/sandybridge/sandybridge.h
parenta017e5fb3dda5ea6bbc94ee15b2e981eeaa2d918 (diff)
nb/intel/sandybridge: improve indexed register helper macros
Replace the multiplications with corresponding shifts, so that it's easier to see at which bit offsets the values get assigned. Change-Id: I0b0d5172394ff65edfe57bdad474631938e58872 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38577 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge/intel/sandybridge/sandybridge.h')
-rw-r--r--src/northbridge/intel/sandybridge/sandybridge.h10
1 files changed, 5 insertions, 5 deletions
diff --git a/src/northbridge/intel/sandybridge/sandybridge.h b/src/northbridge/intel/sandybridge/sandybridge.h
index f5c1e415c7..ffc1d9f7fa 100644
--- a/src/northbridge/intel/sandybridge/sandybridge.h
+++ b/src/northbridge/intel/sandybridge/sandybridge.h
@@ -128,11 +128,11 @@ enum platform_type {
#define MCHBAR32_AND_OR(x, and, or) (MCHBAR32(x) = (MCHBAR32(x) & (and)) | (or))
/* Indexed register helper macros */
-#define Gz(r, z) ((r) + ((z) * 0x100))
-#define Ly(r, y) ((r) + ((y) * 4))
-#define Cx(r, x) ((r) + ((x) * 0x400))
-#define CxLy(r, x, y) ((r) + ((x) * 0x400) + ((y) * 4))
-#define GzLy(r, z, y) ((r) + ((z) * 0x100) + ((y) * 4))
+#define Gz(r, z) ((r) + ((z) << 8))
+#define Ly(r, y) ((r) + ((y) << 2))
+#define Cx(r, x) ((r) + ((x) << 10))
+#define CxLy(r, x, y) ((r) + ((x) << 10) + ((y) << 2))
+#define GzLy(r, z, y) ((r) + ((z) << 8) + ((y) << 2))
/* byte lane training register base addresses */
#define LANEBASE_B0 0x0000