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author | Patrick Georgi <pgeorgi@google.com> | 2014-11-28 22:35:36 +0100 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2014-11-30 12:20:07 +0100 |
commit | bd79c5eaf1f13f33c43c99657f24fa4c0330619a (patch) | |
tree | c20d6e5e00fcf3494d1c3fdd2d84b97ae34a21ea /src/northbridge/intel/sandybridge/romstage_native.c | |
parent | 1b2f2a071488bd15ce80194e85d318cd44659e54 (diff) |
Replace hlt() loops with halt()
Change-Id: I8486e70615f4c404a342cb86963b5357a934c41d
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-on: http://review.coreboot.org/7606
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/northbridge/intel/sandybridge/romstage_native.c')
-rw-r--r-- | src/northbridge/intel/sandybridge/romstage_native.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/northbridge/intel/sandybridge/romstage_native.c b/src/northbridge/intel/sandybridge/romstage_native.c index 902d66d0b9..737cd63c32 100644 --- a/src/northbridge/intel/sandybridge/romstage_native.c +++ b/src/northbridge/intel/sandybridge/romstage_native.c @@ -29,6 +29,7 @@ #include "sandybridge.h" #include <cpu/x86/bist.h> #include <cpu/intel/romstage.h> +#include <halt.h> #include "raminit_native.h" #include "southbridge/intel/bd82x6x/pch.h" #include "southbridge/intel/bd82x6x/gpio.h" @@ -40,7 +41,7 @@ void main(unsigned long bist) if (MCHBAR16(SSKPD) == 0xCAFE) { outb(0x6, 0xcf9); - hlt (); + halt (); } timestamp_init(get_initial_timestamp()); |