diff options
| author | Patrick Rudolph <siro@das-labor.org> | 2017-11-20 11:57:01 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2018-07-28 16:00:42 +0000 |
| commit | 74203de85185842f90ff1708b4f16445cc279688 (patch) | |
| tree | 4ced98a0ea62d32dd8fb22686085b219f07e0bf4 /src/northbridge/intel/sandybridge/romstage.c | |
| parent | 2a7be5bf3061fe8ccd5505f08489ea4671b61f20 (diff) | |
intel/sandybridge: Don't hardcode platform type
* Add a function to return CPU platform ID bits
* Add a function to return platform type
** Platform id is 4 on Lenovo T430 (mobile)
** Platform id is 1 on HP8200 (desktop)
* Use introduced method to handle platform specific code
* Use enum for platform type
* Report platform ID
Change-Id: Ifbfc64c8cec98782d6efc987a4d4d5aeab1402ba
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/22530
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/northbridge/intel/sandybridge/romstage.c')
| -rw-r--r-- | src/northbridge/intel/sandybridge/romstage.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c index 3e128cdff3..63108de893 100644 --- a/src/northbridge/intel/sandybridge/romstage.c +++ b/src/northbridge/intel/sandybridge/romstage.c @@ -85,7 +85,7 @@ void mainboard_romstage_entry(unsigned long bist) /* Perform some early chipset initialization required * before RAM initialization can work */ - sandybridge_early_initialization(SANDYBRIDGE_MOBILE); + sandybridge_early_initialization(); printk(BIOS_DEBUG, "Back from sandybridge_early_initialization()\n"); s3resume = southbridge_detect_s3_resume(); |