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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-02-17 18:10:49 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2021-02-23 02:35:53 +0000
commit4ce0a07f0670e74dd22d5f7af4b8603db2320ded (patch)
tree60679c42a7f8eba961dab8c8d9fcdfb14b02c47b /src/northbridge/intel/sandybridge/romstage.c
parentb6fc13b3dbc943b4981b6b33ba7a0e025c62398a (diff)
nb/intel/x4x,sandybridge: Move romstage_handoff_init() call
Change-Id: I6356bb7ea904ca860cbedd46515924505d515791 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/50972 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/northbridge/intel/sandybridge/romstage.c')
-rw-r--r--src/northbridge/intel/sandybridge/romstage.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c
index 5c0dd5c1a7..fad8e2f91a 100644
--- a/src/northbridge/intel/sandybridge/romstage.c
+++ b/src/northbridge/intel/sandybridge/romstage.c
@@ -4,6 +4,7 @@
#include <cf9_reset.h>
#include <device/pci_ops.h>
#include <cpu/x86/lapic.h>
+#include <romstage_handoff.h>
#include <timestamp.h>
#include "sandybridge.h"
#include <arch/romstage.h>
@@ -75,7 +76,9 @@ void mainboard_romstage_entry(void)
post_code(0x3d);
- northbridge_romstage_finalize(s3resume);
+ northbridge_romstage_finalize();
post_code(0x3f);
+
+ romstage_handoff_init(s3resume);
}