diff options
| author | Patrick Rudolph <patrick.rudolph@9elements.com> | 2019-03-24 18:08:43 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2019-06-08 11:32:42 +0000 |
| commit | 2cdb65d663f6903e82b99f1c74fa51dbfb92e983 (patch) | |
| tree | de1aaf5fd472fd2fffb37f5811bf78b3747632df /src/northbridge/intel/sandybridge/romstage.c | |
| parent | 343e13489e3cf78616661e2a9a863337e251d245 (diff) | |
nb/intel/sandybridge: Drop iommu.c and rename functions
* Move the contents of iommu.c to early_init.c.
* Name the functions like done in intel/soc/common.
* Move PAMx register setup to own function
Preparations for integration in soc/intel/common/*
Tested on Lenovo T520 (Intel Sandy Bridge).
Still boots to OS, no errors visible in dmesg.
Change-Id: I3ec395bf6722bceb84316e92733dcfcd7a093639
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32068
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/sandybridge/romstage.c')
| -rw-r--r-- | src/northbridge/intel/sandybridge/romstage.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/sandybridge/romstage.c b/src/northbridge/intel/sandybridge/romstage.c index 76b3088388..2cef5f2605 100644 --- a/src/northbridge/intel/sandybridge/romstage.c +++ b/src/northbridge/intel/sandybridge/romstage.c @@ -74,8 +74,8 @@ void mainboard_romstage_entry(unsigned long bist) /* Perform some early chipset initialization required * before RAM initialization can work */ - sandybridge_early_initialization(); - printk(BIOS_DEBUG, "Back from sandybridge_early_initialization()\n"); + systemagent_early_init(); + printk(BIOS_DEBUG, "Back from systemagent_early_init()\n"); s3resume = southbridge_detect_s3_resume(); |