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| author | Angel Pons <th3fanbus@gmail.com> | 2020-11-17 16:50:56 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-11-22 22:12:21 +0000 |
| commit | 08f749d5f6a4efd7f69ea56e70a231ceebacde09 (patch) | |
| tree | c4bf93463ca7b5294254ceeab5494454c445d43e /src/northbridge/intel/sandybridge/raminit_common.h | |
| parent | 801a5cbaac21d36042c80b47c9444ea7e48edb1a (diff) | |
nb/intel/sandybridge: Rename and clean up `discover_edges_write`
This is actually an (incomplete) aggressive read training algorithm.
Rename functions and variables accordingly, and tidy up declarations.
Tested on Asus P8H61-M PRO, still boots.
Change-Id: I8a4900f8e3acffe4e4d75a51a2588ad6b65eb411
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47679
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge/intel/sandybridge/raminit_common.h')
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_common.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_common.h b/src/northbridge/intel/sandybridge/raminit_common.h index 44f4768a95..050aa7047c 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.h +++ b/src/northbridge/intel/sandybridge/raminit_common.h @@ -407,7 +407,7 @@ int receive_enable_calibration(ramctr_timing *ctrl); int write_training(ramctr_timing *ctrl); int command_training(ramctr_timing *ctrl); int read_mpr_training(ramctr_timing *ctrl); -int discover_edges_write(ramctr_timing *ctrl); +int aggressive_read_training(ramctr_timing *ctrl); int discover_timC_write(ramctr_timing *ctrl); void normalize_training(ramctr_timing *ctrl); int channel_test(ramctr_timing *ctrl); |