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authorAngel Pons <th3fanbus@gmail.com>2020-03-23 12:26:29 +0100
committerPatrick Georgi <pgeorgi@google.com>2020-03-26 10:20:51 +0000
commit69e1714dd226b68561b0b03bec3f645c4af48530 (patch)
tree2fd5f6664aafe12b0845c4ec31969ea8dbed6f68 /src/northbridge/intel/sandybridge/raminit_common.h
parent394ac5b33ead4233d3527681dc87bd54d1a4d64a (diff)
nb/intel/sandybridge: Use macros for JEDEC commands
Some commands, like ZQCS and ZQCL, use the same macro. This is because they differ in things outside of the IOSAV_SP_CMD_CTRL registers. Also, correct a comment that does not concur with the actual command in use. With BUILD_TIMELESS=1, the binary of ASUS P8Z77-V LX2 remains identical. Change-Id: Id2ff4c85f9d9db7c892b764472423cbf2e6db422 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39776 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Diffstat (limited to 'src/northbridge/intel/sandybridge/raminit_common.h')
-rw-r--r--src/northbridge/intel/sandybridge/raminit_common.h10
1 files changed, 10 insertions, 0 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_common.h b/src/northbridge/intel/sandybridge/raminit_common.h
index 090654c848..fef4419ffc 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.h
+++ b/src/northbridge/intel/sandybridge/raminit_common.h
@@ -26,6 +26,16 @@
#define NUM_SLOTS 2
#define NUM_LANES 8
+#define NO_RANKSEL (~(1 << 16))
+#define IOSAV_MRS (0x1f000)
+#define IOSAV_PRE (0x1f002)
+#define IOSAV_ZQCS (0x1f003)
+#define IOSAV_ACT (0x1f006)
+#define IOSAV_RD (0x1f105)
+#define IOSAV_NOP_ALT (0x1f107)
+#define IOSAV_WR (0x1f201)
+#define IOSAV_NOP (0x1f207)
+
/* FIXME: Vendor BIOS uses 64 but our algorithms are less
performant and even 1 seems to be enough in practice. */
#define NUM_PATTERNS 4