nb/intel/sandybridge: Refine power-down mode logic

When memory is running at fast frequencies, power-down modes can lessen
system stability. Check tXP and tXPDLL values and use safer power down
modes if their values are high. Do not use APD with DLL-off on mobile:
vendor firmware does not use it, and it can influence system stability.

Change-Id: Ic8e98162ca86ae454a8c951be163d58960940e0e
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47746
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>

1 files changed, 9 insertions, 0 deletions

diff --git a/src/northbridge/intel/sandybridge/raminit_common.h b/src/northbridge/intel/sandybridge/raminit_common.h
index 050aa7047c..80d30744a2 100644
--- a/src/northbridge/intel/sandybridge/raminit_common.h
+++ b/src/northbridge/intel/sandybridge/raminit_common.h
@@ -273,6 +273,15 @@ void iosav_write_memory_test_sequence(ramctr_timing *ctrl, int channel, int slot
  */
 #define MRC_CACHE_VERSION 5
 
+enum pdwm_mode {
+	PDM_NONE        = 0,
+	PDM_APD         = 1,
+	PDM_PPD         = 2,
+	PDM_APD_PPD     = 3,
+	PDM_DLL_OFF     = 6,
+	PDM_APD_DLL_OFF = 7,
+};
+
 typedef struct odtmap_st {
 	u16 rttwr;
 	u16 rttnom;