diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-11-11 20:55:35 +0100 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-11-19 22:51:06 +0000 |
| commit | 1c505f82773d345ffdb35d2ad0026f5630ff2d1b (patch) | |
| tree | 853d6302f76ca03fdeba3447524051ec55f6fe41 /src/northbridge/intel/sandybridge/raminit_common.c | |
| parent | 2b48a6089c680de0d06f0b025488e64bd9698822 (diff) | |
nb/intel/sandybridge: Move IOSAV functions to separate file
Change-Id: Icbe01ec98995c3aea97bb0f4f84a938b26896fab
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47491
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/northbridge/intel/sandybridge/raminit_common.c')
| -rw-r--r-- | src/northbridge/intel/sandybridge/raminit_common.c | 33 |
1 files changed, 0 insertions, 33 deletions
diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index 20c048f7f2..ebb9e4488b 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -18,31 +18,6 @@ /* FIXME: no support for 3-channel chipsets */ -/* Number of programmed IOSAV subsequences. */ -static unsigned int ssq_count = 0; - -static void iosav_write_ssq(const int ch, const struct iosav_ssq *ssq) -{ - MCHBAR32(IOSAV_n_SP_CMD_CTRL_ch(ch, ssq_count)) = ssq->sp_cmd_ctrl.raw; - MCHBAR32(IOSAV_n_SUBSEQ_CTRL_ch(ch, ssq_count)) = ssq->subseq_ctrl.raw; - MCHBAR32(IOSAV_n_SP_CMD_ADDR_ch(ch, ssq_count)) = ssq->sp_cmd_addr.raw; - MCHBAR32(IOSAV_n_ADDR_UPDATE_ch(ch, ssq_count)) = ssq->addr_update.raw; - - ssq_count++; -} - -static void iosav_run_queue(const int ch, const u8 loops, const u8 as_timer) -{ - MCHBAR32(IOSAV_SEQ_CTL_ch(ch)) = loops | ((ssq_count - 1) << 18) | (as_timer << 22); - - ssq_count = 0; -} - -static void iosav_run_once(const int ch) -{ - iosav_run_queue(ch, 1, 0); -} - static void sfence(void) { asm volatile ("sfence"); @@ -546,14 +521,6 @@ void dram_memorymap(ramctr_timing *ctrl, int me_uma_size) } } -static void wait_for_iosav(int channel) -{ - while (1) { - if (MCHBAR32(IOSAV_STATUS_ch(channel)) & 0x50) - return; - } -} - static void write_reset(ramctr_timing *ctrl) { int channel, slotrank; |