diff options
| author | Angel Pons <th3fanbus@gmail.com> | 2020-08-03 14:55:18 +0200 |
|---|---|---|
| committer | Angel Pons <th3fanbus@gmail.com> | 2020-08-06 10:57:39 +0000 |
| commit | 8bf197653fadbb9ca932d0c56bd93f1fb1d4beac (patch) | |
| tree | f9c076cacc6ca38af846544d10a98f6a650d4bca /src/northbridge/intel/sandybridge/northbridge.c | |
| parent | 20905cfe26448166f3224bb59b38dba6cc132274 (diff) | |
nb/intel/sandybridge: Deduplicate PCIEXBAR decoding
We can use `decode_pcie_bar` instead, as other northbridges do.
Change-Id: I35bede573ef2635c54123f9e553003577ecd0ea7
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/44122
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge/intel/sandybridge/northbridge.c')
| -rw-r--r-- | src/northbridge/intel/sandybridge/northbridge.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/sandybridge/northbridge.c b/src/northbridge/intel/sandybridge/northbridge.c index 8f1db9791b..e670c09cf0 100644 --- a/src/northbridge/intel/sandybridge/northbridge.c +++ b/src/northbridge/intel/sandybridge/northbridge.c @@ -40,7 +40,7 @@ int bridge_silicon_revision(void) static const int legacy_hole_base_k = 0xa0000 / 1024; static const int legacy_hole_size_k = 384; -static int decode_pcie_bar(u32 *const base, u32 *const len) +int decode_pcie_bar(u32 *const base, u32 *const len) { *base = 0; *len = 0; |