aboutsummaryrefslogtreecommitdiff
path: root/src/northbridge/intel/sandybridge/memmap.h
diff options
context:
space:
mode:
authorAngel Pons <th3fanbus@gmail.com>2021-01-20 01:22:20 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-02-10 07:29:14 +0000
commitd9e58dca9e72ca2efa62eab832aad606c9c58fcd (patch)
tree565e2a763d0e70c2efcc0ce744599829679a275c /src/northbridge/intel/sandybridge/memmap.h
parenta2a9e607b1e92f322da25d0ca23ce565eb2b17d7 (diff)
nb/intel/sandybridge: Use common {DMI,EP,MCH}BAR accessors
Drop unused sandybridge.h includes to avoid build failures on Ironlake. Tested with BUILD_TIMELESS=1, Asus P8Z77-V LX2 remains identical. Change-Id: If2f0147fe50266e2fe2098cafdf004e51282f5e2 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49752 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/northbridge/intel/sandybridge/memmap.h')
-rw-r--r--src/northbridge/intel/sandybridge/memmap.h5
1 files changed, 0 insertions, 5 deletions
diff --git a/src/northbridge/intel/sandybridge/memmap.h b/src/northbridge/intel/sandybridge/memmap.h
index 98251259e1..aae0c35536 100644
--- a/src/northbridge/intel/sandybridge/memmap.h
+++ b/src/northbridge/intel/sandybridge/memmap.h
@@ -3,11 +3,6 @@
#ifndef __NORTHBRIDGE_INTEL_SANDYBRIDGE_MEMMAP_H__
#define __NORTHBRIDGE_INTEL_SANDYBRIDGE_MEMMAP_H__
-/* Northbridge BARs */
-#define DEFAULT_MCHBAR 0xfed10000 /* 16 KB */
-#define DEFAULT_DMIBAR 0xfed18000 /* 4 KB */
-#define DEFAULT_EPBAR 0xfed19000 /* 4 KB */
-
#define GFXVT_BASE 0xfed90000ULL
#define VTVC0_BASE 0xfed91000ULL