diff options
author | Felix Held <felix-coreboot@felixheld.de> | 2019-12-28 18:44:06 +0100 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2019-12-29 12:19:43 +0000 |
commit | bc3668a4687f68fb1bfb39ec89fa863879fed2ac (patch) | |
tree | 00ef4ed278d6217dc16f01408289b2677458984d /src/northbridge/intel/sandybridge/finalize.c | |
parent | 4902fee4412eb15bee5f5e164302730de0ce195e (diff) |
nb/intel/sandybridge: add and use defines for ME base and mask registers
Timeless build results in identical image for X230.
Change-Id: Ia2bd26b97cb2ae77f29d8978f62d2f6be12b43e1
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/37970
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Diffstat (limited to 'src/northbridge/intel/sandybridge/finalize.c')
-rw-r--r-- | src/northbridge/intel/sandybridge/finalize.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/intel/sandybridge/finalize.c b/src/northbridge/intel/sandybridge/finalize.c index 50fc7555f6..fc970baee1 100644 --- a/src/northbridge/intel/sandybridge/finalize.c +++ b/src/northbridge/intel/sandybridge/finalize.c @@ -24,7 +24,7 @@ void intel_sandybridge_finalize_smm(void) pci_or_config16(PCI_DEV_SNB, GGC, 1 << 0); pci_or_config16(PCI_DEV_SNB, PAVPC, 1 << 2); pci_or_config32(PCI_DEV_SNB, DPR, 1 << 0); - pci_or_config32(PCI_DEV_SNB, 0x78, 1 << 10); /* ME */ + pci_or_config32(PCI_DEV_SNB, MEMASK, 1 << 10); pci_or_config32(PCI_DEV_SNB, REMAPBASE, 1 << 0); pci_or_config32(PCI_DEV_SNB, REMAPLIMIT, 1 << 0); pci_or_config32(PCI_DEV_SNB, TOM, 1 << 0); |