diff options
| author | Martin Roth <martinroth@google.com> | 2017-06-24 14:48:50 -0600 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-06-27 17:16:19 +0000 |
| commit | 33232604a71cfb84ef21ff2adc14f4554d1bedb4 (patch) | |
| tree | 7830a72a4eeb74a5adcff6544129bab86acceed1 /src/northbridge/intel/sandybridge/early_init.c | |
| parent | 71693ba43fa8f0d0e7560a3c0a0c465fbd49ce1a (diff) | |
nb/intel: add IS_ENABLED() around Kconfig symbol references
Some of these can be changed from #if to if(), but that will happen
in a follow-on commmit.
Change-Id: Id5bc8b75b1fa372f31982b8636f1efa4975b61a5
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/20346
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/northbridge/intel/sandybridge/early_init.c')
| -rw-r--r-- | src/northbridge/intel/sandybridge/early_init.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/sandybridge/early_init.c b/src/northbridge/intel/sandybridge/early_init.c index efe27b1b29..3580f3509d 100644 --- a/src/northbridge/intel/sandybridge/early_init.c +++ b/src/northbridge/intel/sandybridge/early_init.c @@ -60,7 +60,7 @@ static void sandybridge_setup_bars(void) pci_write_config8(PCI_DEV(0, 0x00, 0), PAM5, 0x33); pci_write_config8(PCI_DEV(0, 0x00, 0), PAM6, 0x33); -#if CONFIG_ELOG_BOOT_COUNT +#if IS_ENABLED(CONFIG_ELOG_BOOT_COUNT) /* Increment Boot Counter for non-S3 resume */ if ((inw(DEFAULT_PMBASE + PM1_STS) & WAK_STS) && ((inl(DEFAULT_PMBASE + PM1_CNT) >> 10) & 7) != SLP_TYP_S3) @@ -69,7 +69,7 @@ static void sandybridge_setup_bars(void) printk(BIOS_DEBUG, " done.\n"); -#if CONFIG_ELOG_BOOT_COUNT +#if IS_ENABLED(CONFIG_ELOG_BOOT_COUNT) /* Increment Boot Counter except when resuming from S3 */ if ((inw(DEFAULT_PMBASE + PM1_STS) & WAK_STS) && ((inl(DEFAULT_PMBASE + PM1_CNT) >> 10) & 7) == SLP_TYP_S3) |