diff options
author | Angel Pons <th3fanbus@gmail.com> | 2020-09-14 17:15:37 +0200 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-09-21 08:03:24 +0000 |
commit | f950a7ec6767eee0a857d01e0c3f67ccf36dd8e1 (patch) | |
tree | f6c6dea0f792c08e8423f290dc330d90197e433d /src/northbridge/intel/sandybridge/early_dmi.c | |
parent | dfca1697fc99613820cca791a95023afbf87c0eb (diff) |
nb/intel/sandybridge: Clean up DMIBAR/EPBAR registers
Several registers have been copy-pasted from i945 and do not exist on
Sandy Bridge. Moreover, other register definitions were missing. Use the
newly-added definitions in existing code, in place of numerical offsets.
Tested with BUILD_TIMELESS=1, Lenovo ThinkPad X230 remains identical.
Change-Id: I9ad849f57bc68256a2a87ffdc856c4b521e35892
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45357
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/northbridge/intel/sandybridge/early_dmi.c')
-rw-r--r-- | src/northbridge/intel/sandybridge/early_dmi.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/sandybridge/early_dmi.c b/src/northbridge/intel/sandybridge/early_dmi.c index 287c4414d2..d4cbec8aa7 100644 --- a/src/northbridge/intel/sandybridge/early_dmi.c +++ b/src/northbridge/intel/sandybridge/early_dmi.c @@ -157,8 +157,8 @@ void early_init_dmi(void) DMIBAR32(0x0914 + (i << 5)) = 0x98200280; } - DMIBAR32(0x022c); // !!! = 0x00c26460 - DMIBAR32(0x022c) = 0x00c2403c; + DMIBAR32(DMIL0SLAT); // !!! = 0x00c26460 + DMIBAR32(DMIL0SLAT) = 0x00c2403c; early_pch_init_native_dmi_pre(); |