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| author | Duncan Laurie <dlaurie@chromium.org> | 2012-04-09 12:05:18 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2012-05-01 20:06:47 +0200 |
| commit | dd585b8825a513d5e304cd3b04da7aeb847b9e8b (patch) | |
| tree | 4736b402b18d790e68c76aa3c01d02fbf9d72d71 /src/northbridge/intel/sandybridge/chip.h | |
| parent | c908fc762cfb3dea096b2805c8cbe9a831b11585 (diff) | |
Update ivybridge graphics initialization
- Add config options to set backlight registers
- Update powermeter weight tables for IvyBridge GT1 and
add a new table for GT2 SKU
- Fix a few registers used during GPU PM init sequence
Change-Id: I1500bc07e3ba1bc10c77e7856089e716489dc07a
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: http://review.coreboot.org/973
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/northbridge/intel/sandybridge/chip.h')
| -rw-r--r-- | src/northbridge/intel/sandybridge/chip.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/northbridge/intel/sandybridge/chip.h b/src/northbridge/intel/sandybridge/chip.h index b891884c9d..bd89787463 100644 --- a/src/northbridge/intel/sandybridge/chip.h +++ b/src/northbridge/intel/sandybridge/chip.h @@ -35,6 +35,9 @@ struct northbridge_intel_sandybridge_config { u16 gpu_panel_power_down_delay; /* T3 time sequence */ u16 gpu_panel_power_backlight_on_delay; /* T5 time sequence */ u16 gpu_panel_power_backlight_off_delay; /* Tx time sequence */ + + u32 gpu_cpu_backlight; /* CPU Backlight PWM value */ + u32 gpu_pch_backlight; /* PCH Backlight PWM value */ }; extern struct chip_operations northbridge_intel_sandybridge_ops; |