diff options
| author | Vladimir Serbinenko <phcoder@gmail.com> | 2014-08-30 00:35:39 +0200 |
|---|---|---|
| committer | Vladimir Serbinenko <phcoder@gmail.com> | 2014-09-13 14:27:03 +0200 |
| commit | a71bdc318195b864c427cddc60e69a6145a8ab28 (patch) | |
| tree | d81255e7c3338cb9a28d71b5713e61126c77ec9e /src/northbridge/intel/sandybridge/chip.h | |
| parent | 85620db107d587a8341987162d403f4b7aee9a81 (diff) | |
intel/gma: consolidate vbt code
Change-Id: I80b7facfb9cc9f642dd1c766884dc23da1aab2c8
Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com>
Reviewed-on: http://review.coreboot.org/6800
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/northbridge/intel/sandybridge/chip.h')
| -rw-r--r-- | src/northbridge/intel/sandybridge/chip.h | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/src/northbridge/intel/sandybridge/chip.h b/src/northbridge/intel/sandybridge/chip.h index cc32c37144..07809f5716 100644 --- a/src/northbridge/intel/sandybridge/chip.h +++ b/src/northbridge/intel/sandybridge/chip.h @@ -17,6 +17,8 @@ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA */ +#include <drivers/intel/gma/i915.h> + /* * Digital Port Hotplug Enable: * 0x04 = Enabled, 2ms short pulse @@ -39,8 +41,5 @@ struct northbridge_intel_sandybridge_config { u32 gpu_cpu_backlight; /* CPU Backlight PWM value */ u32 gpu_pch_backlight; /* PCH Backlight PWM value */ - int gpu_use_spread_spectrum_clock; - int gpu_lvds_dual_channel; - int gpu_link_frequency_270_mhz; - int gpu_lvds_num_lanes; + struct i915_gpu_controller_info gfx; }; |