diff options
| author | Patrick Rudolph <siro@das-labor.org> | 2017-06-06 10:44:29 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-06-09 16:27:19 +0200 |
| commit | b9959e279c40b6db50efa61d20838757080fa4dd (patch) | |
| tree | 2076a6f8bbc9019c555a598d2a3bd5424e3462a0 /src/northbridge/intel/sandybridge/Makefile.inc | |
| parent | 21e7424fc985f2f92ee7e9f505acd72c53035531 (diff) | |
cpu/intel/model_206ax: Use tsc monotonic timer
Switch from lapic to tsc.
Allows timestamps to be used in coreboot, as there's a reference
clock available to calculate correct time units.
Clean Kconfig, remove duplicated lapic code and include tsc dir for
LGA1155 boards.
Tested on Lenovo T430.
Change-Id: I849ca2b3908116d9d22907039cd6e4464444b1d1
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/20044
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/northbridge/intel/sandybridge/Makefile.inc')
| -rw-r--r-- | src/northbridge/intel/sandybridge/Makefile.inc | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc index a40fa157ef..846d31bd78 100644 --- a/src/northbridge/intel/sandybridge/Makefile.inc +++ b/src/northbridge/intel/sandybridge/Makefile.inc @@ -43,7 +43,6 @@ romstage-y += early_init.c romstage-y += report_platform.c romstage-y += ../../../arch/x86/walkcbfs.S -smm-$(CONFIG_HAVE_SMI_HANDLER) += udelay.c smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c ifneq ($(CONFIG_CHROMEOS),y) |