diff options
| author | Patrick Rudolph <siro@das-labor.org> | 2016-11-11 18:22:33 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-12-05 19:00:38 +0100 |
| commit | fd5fa2ad1fb1f3525deab9213bed2c38e083342d (patch) | |
| tree | 625a87d0ff404792716e97022fbb3991c230ac32 /src/northbridge/intel/sandybridge/Makefile.inc | |
| parent | 94f8699d447ef94df339d318b836b664273e89ff (diff) | |
nb/intel/sandybridge/raminit: Split raminit.c
Split raminit.c into smaller parts. Move all functions that will
be used by chip-specific code into raminit_common.c.
The chip-specific changes includes new configuration values
for IvyBridge and 100Mhz reference clock support, including new
frequencies.
No functionality is changed.
Tested on Lenovo T420.
Change-Id: If7bb5949f4b771430f3dba1b754ad241a7e8426b
Signed-off-by: Patrick Rudolph <siro@das-labor.org>
Reviewed-on: https://review.coreboot.org/17604
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
Diffstat (limited to 'src/northbridge/intel/sandybridge/Makefile.inc')
| -rw-r--r-- | src/northbridge/intel/sandybridge/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc index b1bc2ac223..cc0228bf79 100644 --- a/src/northbridge/intel/sandybridge/Makefile.inc +++ b/src/northbridge/intel/sandybridge/Makefile.inc @@ -26,6 +26,7 @@ ramstage-y += acpi.c romstage-y += ram_calc.c ifeq ($(CONFIG_USE_NATIVE_RAMINIT),y) romstage-y += raminit.c +romstage-y += raminit_common.c romstage-y += ../../../device/dram/ddr3.c else romstage-y += raminit_mrc.c |