diff options
| author | Iru Cai <mytbk920423@gmail.com> | 2015-10-18 23:40:34 +0800 |
|---|---|---|
| committer | Vladimir Serbinenko <phcoder@gmail.com> | 2016-03-05 09:39:41 +0100 |
| commit | 8e7928a6fe05a295ca412cb6a6df509de7b73f13 (patch) | |
| tree | b8ebf59718a8a89524e6ea65cc92830cb9c59303 /src/northbridge/intel/sandybridge/Makefile.inc | |
| parent | 42f42ff4501cf0ec345b7f9a3c850934e6f04c00 (diff) | |
sandybridge/gma_lvds: support both Sandy&Ivy on one board
Sandy and Ivy Bridge processors use the same socket, and a mainboard
with the socket can support both types of CPUs. However, they use
different native graphics init code for LVDS and cause a crash if
running the wrong code.
This change detects the CPU type and then selects the right code to
run. It will add some more code in ramstage. It also merges the
{SANDY,IVY}BRIDGE_LVDS symbol to one SANDYBRIDGE_IVYBRIDGE_LVDS.
Tested on a Lenovo T520 with i7-2630qm and i7-3720qm
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Change-Id: I4624759f9c92d56d547db1ab4b9a1d611a182a91
Reviewed-on: https://review.coreboot.org/12087
Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/northbridge/intel/sandybridge/Makefile.inc')
| -rw-r--r-- | src/northbridge/intel/sandybridge/Makefile.inc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/northbridge/intel/sandybridge/Makefile.inc b/src/northbridge/intel/sandybridge/Makefile.inc index a58d9b1f69..4a7a854bee 100644 --- a/src/northbridge/intel/sandybridge/Makefile.inc +++ b/src/northbridge/intel/sandybridge/Makefile.inc @@ -18,8 +18,8 @@ ifeq ($(CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE)$(CONFIG_NORTHBRIDGE_INTEL_IVYBRIDG ramstage-y += ram_calc.c ramstage-y += northbridge.c ramstage-y += gma.c -ramstage-$(CONFIG_IVYBRIDGE_LVDS) += gma_ivybridge_lvds.c -ramstage-$(CONFIG_SANDYBRIDGE_LVDS) += gma_sandybridge_lvds.c +ramstage-$(CONFIG_SANDYBRIDGE_IVYBRIDGE_LVDS) += gma_sandybridge_lvds.c +ramstage-$(CONFIG_SANDYBRIDGE_IVYBRIDGE_LVDS) += gma_ivybridge_lvds.c ramstage-y += acpi.c ramstage-y += mrccache.c |